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#ifndef _PCITOOL_PCILIB_H
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#define _PCITOOL_PCILIB_H
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#define PCILIB_MAX_BANKS 6
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#define PCILIB_MAX_DMA_ENGINES 32
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#include <sys/time.h>
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#define pcilib_memcpy pcilib_memcpy32
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#define pcilib_datacpy pcilib_datacpy32
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typedef struct pcilib_s pcilib_t;
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typedef struct pcilib_event_context_s pcilib_context_t;
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typedef struct pcilib_dma_context_s pcilib_dma_context_t;
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typedef struct pcilib_dma_api_description_s pcilib_dma_api_description_t;
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typedef struct pcilib_event_api_description_s pcilib_event_api_description_t;
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typedef struct pcilib_protocol_description_s pcilib_protocol_description_t;
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typedef unsigned int pcilib_irq_hw_source_t;
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typedef uint32_t pcilib_irq_source_t;
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typedef uint8_t pcilib_bar_t; /**< Type holding the PCI Bar number */
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typedef uint8_t pcilib_register_t; /**< Type holding the register ID within the Bank */
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typedef uint32_t pcilib_register_addr_t; /**< Type holding the register ID within the Bank */
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typedef uint8_t pcilib_register_bank_t; /**< Type holding the register bank number */
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typedef uint8_t pcilib_register_bank_addr_t; /**< Type holding the register bank number */
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typedef uint16_t pcilib_register_t; /**< Type holding the register position within the field listing registers in the model */
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typedef uint32_t pcilib_register_addr_t; /**< Type holding the register address within address-space of BARs */
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typedef uint8_t pcilib_register_size_t; /**< Type holding the size in bits of the register */
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typedef uint32_t pcilib_register_value_t; /**< Type holding the register value */
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typedef uint8_t pcilib_dma_engine_addr_t;
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} pcilib_endianess_t;
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PCILIB_MODEL_IPECAMERA,
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PCILIB_REGISTER_R = 1,
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PCILIB_REGISTER_W = 2,
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PCILIB_REGISTER_RW = 3,
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PCILIB_REGISTER_W1C = 4, /**< writting 1 resets the flag */
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PCILIB_REGISTER_RW1C = 5
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} pcilib_register_mode_t;
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PCILIB_DEFAULT_PROTOCOL,
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IPECAMERA_REGISTER_PROTOCOL
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} pcilib_register_protocol_t;
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PCILIB_EVENT_DATA = 0, /**< default data format */
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PCILIB_EVENT_RAW_DATA = 1 /**< raw data */
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typedef enum { /**< 0x8000 and up are reserved for driver-specific types */
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PCILIB_EVENT_DATA = 0, /**< default data format */
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PCILIB_EVENT_RAW_DATA = 1 /**< raw data */
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} pcilib_event_data_type_t;
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PCILIB_DMA_TO_DEVICE = 1,
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PCILIB_DMA_FROM_DEVICE = 2,
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PCILIB_DMA_BIDIRECTIONAL = 3
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} pcilib_dma_direction_t;
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PCILIB_DMA_FLAGS_DEFAULT = 0,
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PCILIB_DMA_FLAG_EOP = 1, /**< last buffer of the packet */
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PCILIB_DMA_FLAG_WAIT = 2, /**< wait completion of write operation / wait for data during read operation */
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PCILIB_DMA_FLAG_MULTIPACKET = 4, /**< read multiple packets */
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PCILIB_DMA_FLAG_PERSISTENT = 8, /**< do not stop DMA engine on application termination / permanently close DMA engine on dma_stop */
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PCILIB_DMA_FLAG_IGNORE_ERRORS = 16 /**< do not crash on errors, but return appropriate error codes */
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PCILIB_DMA_FLAG_EOP = 1, /**< last buffer of the packet */
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PCILIB_DMA_FLAG_WAIT = 2, /**< wait completion of write operation / wait for data during read operation */
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PCILIB_DMA_FLAG_MULTIPACKET = 4, /**< read multiple packets */
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PCILIB_DMA_FLAG_PERSISTENT = 8, /**< do not stop DMA engine on application termination / permanently close DMA engine on dma_stop */
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PCILIB_DMA_FLAG_IGNORE_ERRORS = 16 /**< do not crash on errors, but return appropriate error codes */
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} pcilib_dma_flags_t;
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PCILIB_STREAMING_STOP = 0, /**< stop streaming */
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PCILIB_STREAMING_CONTINUE = 1, /**< wait the default DMA timeout for a new data */
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PCILIB_STREAMING_WAIT = 2, /**< wait the specified timeout for a new data */
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PCILIB_STREAMING_CHECK = 3, /**< do not wait for the data, bail out imideatly if no data ready */
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PCILIB_STREAMING_FAIL = 4, /**< fail if data is not available on timeout */
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PCILIB_STREAMING_REQ_FRAGMENT = 5, /**< only fragment of a packet is read, wait for next fragment and fail if no data during DMA timeout */
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PCILIB_STREAMING_REQ_PACKET = 6, /**< wait for next packet and fail if no data during the specified timeout */
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PCILIB_STREAMING_TIMEOUT_MASK = 3 /**< mask specifying all timeout modes */
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} pcilib_streaming_action_t;
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PCILIB_EVENT_FLAGS_DEFAULT = 0,
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PCILIB_EVENT_FLAG_RAW_DATA_ONLY = 1, /**< Do not parse data, just read raw and pass it to rawdata callback. If passed to rawdata callback, idicates the data is not identified as event (most probably just padding) */
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PCILIB_EVENT_FLAG_STOP_ONLY = 1, /**< Do not cleanup, just stop acquiring new frames, the cleanup should be requested afterwards */
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PCILIB_EVENT_INFO_FLAG_BROKEN = 1 /**< Indicates broken frames (if this flag is fales, the frame still can be broken) */
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} pcilib_event_info_flags_t;
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PCILIB_REGISTER_STANDARD = 0,
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PCILIB_REGISTER_FIFO,
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} pcilib_register_type_t;
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uint64_t seqnum; /**< we will add seqnum_overflow if required */
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uint64_t offset; /**< nanoseconds */
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struct timeval timestamp; /**< most accurate timestamp */
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pcilib_event_info_flags_t flags; /**< flags */
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} pcilib_event_info_t;
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#define PCILIB_BAR_DETECT ((pcilib_bar_t)-1)
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#define PCILIB_BAR_INVALID ((pcilib_bar_t)-1)
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#define PCILIB_DMA_ENGINE_ADDR_INVALID ((pcilib_dma_engine_addr_t)-1)
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#define PCILIB_REGISTER_INVALID ((pcilib_register_t)-1)
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#define PCILIB_ADDRESS_INVALID ((uintptr_t)-1)
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#define PCILIB_REGISTER_BANK_INVALID ((pcilib_register_bank_t)-1)
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#define PCILIB_REGISTER_BANK0 0
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#define PCILIB_REGISTER_BANK1 1
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#define PCILIB_REGISTER_BANK2 2
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#define PCILIB_REGISTER_BANK3 3
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#define PCILIB_REGISTER_BANK_DMA 128
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#define PCILIB_EVENT0 1
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#define PCILIB_EVENT1 2
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#define PCILIB_EVENT2 4
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#define PCILIB_TIMEOUT_IMMEDIATE 0
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#define PCILIB_IRQ_TYPE_ALL 0
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#define PCILIB_IRQ_SOURCE_DEFAULT 0
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#define PCILIB_REGISTER_NO_BITS 0
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#define PCILIB_REGISTER_ALL_BITS ((pcilib_register_value_t)-1)
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#define PCILIB_MODEL_DETECT NULL
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uint64_t seqnum; /**< we will add seqnum_overflow if required */
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uint64_t offset; /**< nanoseconds */
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struct timeval timestamp; /**< most accurate timestamp */
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pcilib_event_info_flags_t flags; /**< flags */
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} pcilib_event_info_t;
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* Callback function called when new data is read by DMA streaming function
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typedef int (*pcilib_event_callback_t)(pcilib_event_id_t event_id, pcilib_event_info_t *info, void *user);
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typedef int (*pcilib_event_rawdata_callback_t)(pcilib_event_id_t event_id, pcilib_event_info_t *info, pcilib_event_flags_t flags, size_t size, void *data, void *user);
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pcilib_register_bank_addr_t addr;
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pcilib_bar_t bar; // optional
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pcilib_register_protocol_t protocol;
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uintptr_t read_addr; // or offset if bar specified
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uintptr_t write_addr; // or offset if bar specified
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uint8_t raw_endianess;
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const char *description;
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} pcilib_register_bank_description_t;
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pcilib_register_addr_t addr;
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pcilib_register_size_t offset;
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pcilib_register_size_t bits;
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pcilib_register_value_t defvalue;
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pcilib_register_value_t rwmask; /**< 1 - read before write bits, 0 - zero should be written to preserve value
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Used to define how external bits of PCILIB_REGISTER_BITS registers are treated.
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Currently it is a bit confusing, we may find a better way in the next release */
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pcilib_register_mode_t mode;
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pcilib_register_type_t type;
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pcilib_register_bank_t bank;
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const char *description;
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} pcilib_register_description_t;
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pcilib_register_bank_addr_t bank;
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} pcilib_register_range_t;
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const char *description;
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} pcilib_event_description_t;
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pcilib_event_data_type_t data_type;
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const char *description;
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} pcilib_event_data_type_description_t;
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PCILIB_DMA_TO_DEVICE = 1,
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PCILIB_DMA_FROM_DEVICE = 2,
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PCILIB_DMA_BIDIRECTIONAL = 3
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} pcilib_dma_direction_t;
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PCILIB_DMA_TYPE_BLOCK,
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PCILIB_DMA_TYPE_PACKET,
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PCILIB_DMA_TYPE_UNKNOWN
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} pcilib_dma_engine_type_t;
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pcilib_dma_engine_addr_t addr;
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pcilib_dma_engine_type_t type;
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pcilib_dma_direction_t direction;
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} pcilib_dma_engine_description_t;
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pcilib_dma_engine_description_t *engines[PCILIB_MAX_DMA_ENGINES + 1];
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pcilib_register_description_t *registers;
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pcilib_register_bank_description_t *banks;
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pcilib_register_range_t *ranges;
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pcilib_event_description_t *events;
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pcilib_event_data_type_description_t *data_types;
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pcilib_dma_api_description_t *dma_api;
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pcilib_event_api_description_t *event_api;
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} pcilib_model_description_t;
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int pcilib_set_error_handler(void (*err)(const char *msg, ...), void (*warn)(const char *msg, ...));
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pcilib_model_t pcilib_get_model(pcilib_t *ctx);
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pcilib_model_description_t *pcilib_get_model_description(pcilib_t *ctx);
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pcilib_context_t *pcilib_get_implementation_context(pcilib_t *ctx);
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pcilib_t *pcilib_open(const char *device, pcilib_model_t model);
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pcilib_t *pcilib_open(const char *device, const char *model);
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void pcilib_close(pcilib_t *ctx);
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int pcilib_start_dma(pcilib_t *ctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags);
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char *pcilib_resolve_register_address(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr); // addr is offset if bar is specified
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char *pcilib_resolve_data_space(pcilib_t *ctx, uintptr_t addr, size_t *size);
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pcilib_register_bank_t pcilib_find_bank_by_addr(pcilib_t *ctx, pcilib_register_bank_addr_t bank);
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pcilib_register_bank_t pcilib_find_bank_by_name(pcilib_t *ctx, const char *bankname);
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pcilib_register_bank_t pcilib_find_bank(pcilib_t *ctx, const char *bank);
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pcilib_register_t pcilib_find_register(pcilib_t *ctx, const char *bank, const char *reg);
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pcilib_event_t pcilib_find_event(pcilib_t *ctx, const char *event);
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pcilib_event_data_type_t pcilib_find_event_data_type(pcilib_t *ctx, pcilib_event_t event, const char *data_type);
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pcilib.h
