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  • Committer: Suren A. Chilingaryan
  • Date: 2011-07-09 03:33:18 UTC
  • Revision ID: csa@dside.dyndns.org-20110709033318-2k7vk5s5p5u7btem
Support dynamic registers, support register offsets and multiregisters (bitmasks), list NWL DMA registers

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Lines of Context:
ipecamera/model.c
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//#define IPECAMERA_SIMPLIFIED_READOUT
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#define IPECAMERA_MULTIREAD
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static pcilib_register_value_t ipecamera_bit_mask[9] = { 0, 1, 3, 7, 15, 31, 63, 127, 255 };
 
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//static pcilib_register_value_t ipecamera_bit_mask[9] = { 0, 1, 3, 7, 15, 31, 63, 127, 255 };
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int ipecamera_read(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, uint8_t bits, pcilib_register_value_t *value) {
 
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int ipecamera_read(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t *value) {
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    uint32_t val, tmp[4];
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    char *wr, *rd;
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    struct timeval start, cur;
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        return PCILIB_ERROR_VERIFY;
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    }
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    *value = val&ipecamera_bit_mask[bits];
 
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//    *value = val&ipecamera_bit_mask[bits];
 
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    *value = val&0xFF;
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    return 0;
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}
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int ipecamera_write(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, uint8_t bits, pcilib_register_value_t value) {
 
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int ipecamera_write(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, pcilib_register_value_t value) {
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    uint32_t val, tmp[4];
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    char *wr, *rd;
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    struct timeval start, cur;
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        return PCILIB_ERROR_VERIFY;
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    }
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    if ((val&ipecamera_bit_mask[bits]) != value) {
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        pcilib_error("Value verification failed during register read (CMOSIS %lu, value: %lu != %lu)", addr, val&ipecamera_bit_mask[bits], value);
 
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    if ((val&0xFF/*&ipecamera_bit_mask[bits]*/) != value) {
 
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        pcilib_error("Value verification failed during register read (CMOSIS %lu, value: %lu != %lu)", addr, val/*&ipecamera_bit_mask[bits]*/, value);
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        return PCILIB_ERROR_VERIFY;
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    }
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