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  • Committer: Suren A. Chilingaryan
  • Date: 2011-07-09 03:33:18 UTC
  • Revision ID: csa@dside.dyndns.org-20110709033318-2k7vk5s5p5u7btem
Support dynamic registers, support register offsets and multiregisters (bitmasks), list NWL DMA registers

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#include "nwl.h"
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#include "nwl_defines.h"
 
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#include "nwl_register.h"
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#define NWL_XAUI_ENGINE 0
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#define NWL_XRAWDATA_ENGINE 1
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#define NWL_FIX_EOP_FOR_BIG_PACKETS             // requires precise sizes in read requests
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/*
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pcilib_register_bank_description_t ipecamera_register_banks[] = {
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    { PCILIB_REGISTER_DMABANK0, PCILIB_BAR0, 128, PCILIB_DEFAULT_PROTOCOL, DMA_NWL_OFFSET, DMA_NWL_OFFSET, PCILIB_LITTLE_ENDIAN, 32, PCILIB_LITTLE_ENDIAN, "%lx", "dma", "NorthWest Logick DMA Engine" },
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    { 0, 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL }
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};
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*/
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typedef struct {
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    pcilib_dma_engine_description_t desc;
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#define nwl_read_register(var, ctx, base, reg) pcilib_datacpy(&var, base + reg, 4, 1, ctx->dma_bank->raw_endianess)
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#define nwl_write_register(var, ctx, base, reg) pcilib_datacpy(base + reg, &var, 4, 1, ctx->dma_bank->raw_endianess)
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static int nwl_add_registers(nwl_dma_t *ctx) {
 
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    int err;
 
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    size_t n, i, j;
 
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    int length;
 
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    const char *names[NWL_MAX_DMA_ENGINE_REGISTERS];
 
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    uintptr_t addr[NWL_MAX_DMA_ENGINE_REGISTERS];
 
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        // We don't want DMA registers
 
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    if (pcilib_find_bank_by_addr(ctx->pcilib, PCILIB_REGISTER_BANK_DMA) == PCILIB_REGISTER_BANK_INVALID) return 0;
 
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    err = pcilib_add_registers(ctx->pcilib, 0, nwl_dma_registers);
 
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    if (err) return err;
 
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    err = pcilib_add_registers(ctx->pcilib, 0, nwl_xrawdata_registers);
 
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    if (err) return err;
 
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    for (n = 0; nwl_dma_engine_registers[n].bits; n++) {
 
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        names[n] = nwl_dma_engine_registers[n].name;
 
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        addr[n] = nwl_dma_engine_registers[n].addr;
 
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    }
 
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    if (ctx->n_engines > 9) length = 2;
 
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    else length = 1;
 
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    for (i = 0; i < ctx->n_engines; i++) {
 
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        for (j = 0; nwl_dma_engine_registers[j].bits; j++) {
 
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            const char *direction;
 
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            nwl_dma_engine_registers[j].name = nwl_dma_engine_register_names[i * NWL_MAX_DMA_ENGINE_REGISTERS + j];
 
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            nwl_dma_engine_registers[j].addr = addr[j] + (ctx->engines[i].base_addr - ctx->base_addr);
 
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//          printf("%lx %lx\n", (ctx->engines[i].base_addr - ctx->base_addr), nwl_dma_engine_registers[j].addr);
 
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            switch (ctx->engines[i].desc.direction) {
 
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                case PCILIB_DMA_FROM_DEVICE:
 
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                    direction =  "r";
 
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                break;
 
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                case PCILIB_DMA_TO_DEVICE:
 
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                    direction = "w";
 
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                break;
 
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                default:
 
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                    direction = "";
 
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            }
 
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            sprintf((char*)nwl_dma_engine_registers[j].name, names[j], length, ctx->engines[i].desc.addr, direction);
 
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        }
 
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        err = pcilib_add_registers(ctx->pcilib, n, nwl_dma_engine_registers);
 
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        if (err) return err;
 
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    }
 
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    for (n = 0; nwl_dma_engine_registers[n].bits; n++) {
 
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        nwl_dma_engine_registers[n].name = names[n];
 
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        nwl_dma_engine_registers[n].addr = addr[n];
 
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    }
 
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    return 0;
 
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}
 
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static int nwl_read_engine_config(nwl_dma_t *ctx, pcilib_nwl_engine_description_t *info, char *base) {
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    uint32_t val;
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    pcilib_nwl_engine_description_t *info = ctx->engines + dma;
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    char *base = ctx->engines[dma].base_addr;
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    return 0;
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    if (info->desc.addr == NWL_XRAWDATA_ENGINE) {
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            // Stop Generators
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        nwl_read_register(val, ctx, ctx->base_addr, TX_CONFIG_ADDRESS);
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        pcilib_register_bank_t dma_bank = pcilib_find_bank_by_addr(pcilib, PCILIB_REGISTER_BANK_DMA);
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        if (dma_bank == PCILIB_REGISTER_BANK_INVALID) {
 
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            free(ctx);
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            pcilib_error("DMA Register Bank could not be found");
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            return NULL;
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        }
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        pcilib_set_dma_engine_description(pcilib, n_engines, NULL);
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        ctx->n_engines = n_engines;
 
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        err = nwl_add_registers(ctx);
 
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        if (err) {
 
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            free(ctx);
 
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            pcilib_error("Failed to add DMA registers");
 
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            return NULL;
 
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        }
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    }
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    return (pcilib_dma_context_t*)ctx;
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}