/alps/pcitool

To get this branch, use:
bzr branch http://suren.me/webbzr/alps/pcitool

« back to all changes in this revision

Viewing changes to dma/nwl.c

  • Committer: Suren A. Chilingaryan
  • Date: 2011-07-12 12:39:06 UTC
  • Revision ID: csa@dside.dyndns.org-20110712123906-4tas2h34i0b2tkp8
Provide IRQ enable/disable call

Show diffs side-by-side

added added

removed removed

Lines of Context:
dma/nwl.c
240
240
    if (ctx->started) return 0;
241
241
    
242
242
#ifdef NWL_GENERATE_DMA_IRQ
243
 
    dma_nwl_enable_irq(ctx, PCILIB_DMA_IRQ);
 
243
    dma_nwl_enable_irq(ctx, PCILIB_DMA_IRQ, 0);
244
244
#endif /* NWL_GENERATE_DMA_IRQ */
245
245
 
246
246
    ctx->started = 1;
255
255
    
256
256
    ctx->started = 0;
257
257
    
258
 
    err = dma_nwl_disable_irq(ctx);
 
258
    err = dma_nwl_free_irq(ctx);
259
259
    if (err) return err;
260
260
    
261
261
    err = dma_nwl_stop_loopback(ctx);
355
355
    if (data) {
356
356
        for (pos = 0; pos < size; pos += info->page_size) {
357
357
            int block_size = min2(size - pos, info->page_size);
358
 
    
 
358
            
359
359
            bufnum = dma_nwl_get_next_buffer(ctx, info, 1, timeout);
360
360
            if (bufnum == PCILIB_DMA_BUFFER_INVALID) {
361
361
                if (written) *written = pos;
431
431
    uint32_t val;
432
432
    uint32_t *buf, *cmp;
433
433
    const char *error = NULL;
 
434
//    pcilib_register_value_t regval;
434
435
 
435
436
    size_t us = 0;
436
437
    struct timeval start, cur;
446
447
    if (size%sizeof(uint32_t)) size = 1 + size / sizeof(uint32_t);
447
448
    else size /= sizeof(uint32_t);
448
449
 
 
450
        // Not supported
 
451
    if (direction == PCILIB_DMA_TO_DEVICE) return -1.;
 
452
 
449
453
        // Stop Generators and drain old data
450
454
    dma_nwl_stop_loopback(ctx);
451
 
    dma_nwl_stop_engine(ctx, readid); // DS: replace with something better
 
455
//    dma_nwl_stop_engine(ctx, readid); // DS: replace with something better
452
456
 
453
457
    __sync_synchronize();
454
458
 
456
460
 
457
461
#ifdef NWL_GENERATE_DMA_IRQ
458
462
    dma_nwl_enable_engine_irq(ctx, readid);
 
463
    dma_nwl_enable_engine_irq(ctx, writeid);
459
464
#endif /* NWL_GENERATE_DMA_IRQ */
460
465
 
 
466
 
461
467
    dma_nwl_start_loopback(ctx, direction, size * sizeof(uint32_t));
462
468
 
463
469
/*
 
470
    printf("Packet size: %li\n", size * sizeof(uint32_t));
 
471
    pcilib_read_register(ctx->pcilib, NULL, "dma1w_counter", &regval);
 
472
    printf("Count write: %lx\n", regval);
 
473
 
464
474
    nwl_read_register(val, ctx, read_base, REG_DMA_ENG_CTRL_STATUS);
465
475
    printf("Read DMA control: %lx\n", val);    
466
476
    nwl_read_register(val, ctx, write_base, REG_DMA_ENG_CTRL_STATUS);
467
477
    printf("Write DMA control: %lx\n", val);    
 
478
 
 
479
    nwl_read_register(val, ctx, write_base, REG_DMA_ENG_NEXT_BD);
 
480
    printf("Pointer1: %lx\n", val);    
 
481
    nwl_read_register(val, ctx, write_base, REG_SW_NEXT_BD);
 
482
    printf("Pointer2: %lx\n", val);    
468
483
*/
469
484
 
470
485
        // Allocate memory and prepare data
486
501
 
487
502
            err = pcilib_write_dma(ctx->pcilib, writeid, addr, size * sizeof(uint32_t), buf, &bytes);
488
503
            if ((err)||(bytes != size * sizeof(uint32_t))) {
489
 
                printf("%i %lu write\n", err, bytes);
490
504
                error = "Write failed";
491
505
                break;
492
506
            }
493
507
        }
494
508
/*
 
509
    printf("RegRead: %i\n",pcilib_read_register(ctx->pcilib, NULL, "dma1w_counter", &regval));
 
510
    printf("Count write (%i of %i): %lx\n", i, iterations, regval);
 
511
 
 
512
    printf("RegRead: %i\n",pcilib_read_register(ctx->pcilib, NULL, "dma1r_counter", &regval));
 
513
    printf("Count read (%i of %i): %lx\n", i, iterations, regval);
 
514
 
 
515
 
 
516
    nwl_read_register(val, ctx, read_base, REG_DMA_ENG_COMP_BYTES);
 
517
    printf("Compl Bytes (read): %lx\n", val);    
 
518
 
 
519
    nwl_read_register(val, ctx, write_base, REG_DMA_ENG_COMP_BYTES);
 
520
    printf("Compl Bytes (write): %lx\n", val);    
 
521
 
 
522
    nwl_read_register(val, ctx, read_base, REG_DMA_ENG_CTRL_STATUS);
 
523
    printf("Read DMA control (after write): %lx\n", val);    
 
524
*/
 
525
/*
495
526
    nwl_read_register(val, ctx, read_base, REG_DMA_ENG_CTRL_STATUS);
496
527
    printf("Read DMA control (after write): %lx\n", val);    
497
528
    nwl_read_register(val, ctx, write_base, REG_DMA_ENG_CTRL_STATUS);
504
535
        us += ((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec));
505
536
 
506
537
        if ((err)||(bytes != size * sizeof(uint32_t))) {
507
 
            printf("%i %lu read\n", err, bytes);
 
538
/*
 
539
    nwl_read_register(val, ctx, read_base, REG_DMA_ENG_CTRL_STATUS);
 
540
    printf("Read DMA control: %lx\n", val);    
 
541
    nwl_read_register(val, ctx, write_base, REG_DMA_ENG_CTRL_STATUS);
 
542
    printf("Write DMA control: %lx\n", val);    
 
543
    nwl_read_register(val, ctx, write_base, REG_DMA_ENG_NEXT_BD);
 
544
    printf("After Pointer wr1: %lx\n", val);    
 
545
    nwl_read_register(val, ctx, write_base, REG_SW_NEXT_BD);
 
546
    printf("After Pointer wr2: %lx\n", val);    
 
547
    pcilib_read_register(ctx->pcilib, NULL, "end_address", &regval);
 
548
    printf("End address: %lx\n", regval);
 
549
 
 
550
        nwl_read_register(val, ctx, read_base, REG_DMA_ENG_NEXT_BD);
 
551
        printf("After Pointer read1: %lx\n", val);    
 
552
        nwl_read_register(val, ctx, read_base, REG_SW_NEXT_BD);
 
553
        printf("After Pointer read2: %lx\n", val);    
 
554
*/
508
555
             error = "Read failed";
509
556
             break;
510
557
        }
512
559
        if (direction == PCILIB_DMA_BIDIRECTIONAL) {
513
560
            res = memcmp(buf, cmp, size * sizeof(uint32_t));
514
561
            if (res) {
515
 
                puts("verify");
516
562
                error = "Written and read values does not match";
517
563
                break;
518
564
            }
519
565
        }
520
566
             
521
567
    }
 
568
    
 
569
    if (error) {
 
570
        pcilib_warning("%s at iteration %i, error: %i, bytes: %zu", error, i, err, bytes);
 
571
    }
 
572
    
 
573
/*
 
574
    puts("Finished...");
 
575
    nwl_read_register(val, ctx, read_base, REG_DMA_ENG_NEXT_BD);
 
576
    printf("After Pointer read1: %lx\n", val);    
 
577
    nwl_read_register(val, ctx, read_base, REG_SW_NEXT_BD);
 
578
    printf("After Pointer read2: %lx\n", val);    
 
579
 
 
580
    nwl_read_register(val, ctx, write_base, REG_DMA_ENG_NEXT_BD);
 
581
    printf("After Pointer wr1: %lx\n", val);    
 
582
    nwl_read_register(val, ctx, write_base, REG_SW_NEXT_BD);
 
583
    printf("After Pointer wr2: %lx\n", val);    
 
584
*/
522
585
 
523
586
#ifdef NWL_GENERATE_DMA_IRQ
524
 
    dma_nwl_disable_irq(ctx);
 
587
    dma_nwl_disable_engine_irq(ctx, writeid);
 
588
    dma_nwl_disable_engine_irq(ctx, readid);
525
589
#endif /* NWL_GENERATE_DMA_IRQ */
526
590
 
527
591
    dma_nwl_stop_loopback(ctx);