/alps/pcitool

To get this branch, use:
bzr branch http://suren.me/webbzr/alps/pcitool

« back to all changes in this revision

Viewing changes to pcilib/pci.h

  • Committer: Suren A. Chilingaryan
  • Date: 2015-09-24 02:28:45 UTC
  • mfrom: (305.1.19 views)
  • Revision ID: csa@suren.me-20150924022845-p7hc8lh8v0q48g0r
Finalyze XML support and provide initial support for views (only descriptions so far)

Show diffs side-by-side

added added

removed removed

Lines of Context:
8
8
#define PCILIB_DMA_SKIP_TIMEOUT 1000000         /**< us */
9
9
#define PCILIB_MAX_BARS 6                       /**< this is defined by PCI specification */
10
10
#define PCILIB_DEFAULT_REGISTER_SPACE 1024      /**< number of registers to allocate on init */
 
11
#define PCILIB_DEFAULT_VIEW_SPACE 128           /**< number of views to allocate on init */
 
12
#define PCILIB_DEFAULT_UNIT_SPACE 128           /**< number of units to allocate on init */
11
13
#define PCILIB_MAX_REGISTER_BANKS 32            /**< maximum number of register banks to allocate space for */
12
14
#define PCILIB_MAX_REGISTER_RANGES 32           /**< maximum number of register ranges to allocate space for */
13
15
#define PCILIB_MAX_REGISTER_PROTOCOLS 32        /**< maximum number of register protocols to support */
14
16
#define PCILIB_MAX_DMA_ENGINES 32               /**< maximum number of supported DMA engines */
15
17
 
 
18
#include <uthash.h>
 
19
 
16
20
#include "linux-3.10.h"
17
21
#include "driver/pciDriver.h"
18
22
 
26
30
#include "export.h"
27
31
#include "locking.h"
28
32
#include "xml.h"
 
33
#include "view.h"
29
34
 
30
35
typedef struct {
31
36
    uint8_t max_link_speed, link_speed;
33
38
    uint8_t max_payload, payload;
34
39
} pcilib_pcie_link_info_t;
35
40
 
 
41
struct pcilib_view_context_s {
 
42
    UT_hash_handle hh;
 
43
    pcilib_view_t view;
 
44
    pcilib_view_api_description_t *api;
 
45
    pcilib_view_description_t desc;                                                     /**< We will allocate more memory and store actual description instance here, so it should be the last member */
 
46
}; 
 
47
 
 
48
struct pcilib_unit_context_s {
 
49
    UT_hash_handle hh;
 
50
    pcilib_unit_t unit;
 
51
    pcilib_unit_description_t desc;
 
52
};
 
53
 
 
54
typedef struct {
 
55
    pcilib_register_bank_t bank;                                                        /**< Reference to bank containing the register */
 
56
    pcilib_register_value_t min, max;                                                   /**< Minimum & maximum allowed values */
 
57
    pcilib_xml_node_t *xml;                                                             /**< Additional XML properties */
 
58
    pcilib_view_reference_t *views;                                                     /**< For non-static list of views, this vairables holds a copy of a NULL-terminated list from model (if present, memory should be de-allocated) */
 
59
} pcilib_register_context_t;
 
60
 
36
61
struct pcilib_s {
37
62
    int handle;                                                                         /**< file handle of device */
38
63
    
62
87
    size_t num_banks, num_protocols, num_ranges;                                        /**< Number of registered banks, protocols, and register ranges */
63
88
    size_t num_engines;                                                                 /**< Number of configured DMA engines */
64
89
    size_t dyn_banks;                                                                   /**< Number of configured dynamic banks */
65
 
 
66
90
    pcilib_register_description_t *registers;                                           /**< List of currently defined registers (from all sources) */
67
91
    pcilib_register_bank_description_t banks[PCILIB_MAX_REGISTER_BANKS + 1];            /**< List of currently defined register banks (from all sources) */
68
92
    pcilib_register_range_t ranges[PCILIB_MAX_REGISTER_RANGES + 1];                     /**< List of currently defined register ranges (from all sources) */
75
99
    pcilib_dma_context_t *dma_ctx;                                                      /**< DMA context */
76
100
    pcilib_context_t *event_ctx;                                                        /**< Implmentation context */
77
101
 
 
102
    size_t num_views, alloc_views;                                                      /**< Number of configured and allocated  views*/
 
103
    size_t num_units, alloc_units;                                                      /**< Number of configured and allocated  units*/
 
104
    pcilib_view_description_t **views;                                                  /**< list of currently defined views */
 
105
    pcilib_unit_description_t *units;                                                   /**< list of currently defined units */
 
106
 
78
107
    pcilib_lock_t *dma_rlock[PCILIB_MAX_DMA_ENGINES];                                   /**< Per-engine locks to serialize streaming and read operations */
79
108
    pcilib_lock_t *dma_wlock[PCILIB_MAX_DMA_ENGINES];                                   /**< Per-engine locks to serialize write operations */
80
109