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#include <arpa/inet.h>
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int pcilib_add_registers(pcilib_t *ctx, size_t n, pcilib_register_description_t *registers) {
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pcilib_register_description_t *regs;
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size_t size, n_present = 0;
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for (n = 0; registers[n].bits; n++);
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if (ctx->model_info.registers == pcilib_model[ctx->model].registers) {
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for (n_present = 0; ctx->model_info.registers[n_present].bits; n_present++);
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for (size = 1024; size < 2 * (n + n_present + 1); size<<=1);
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regs = (pcilib_register_description_t*)malloc(size * sizeof(pcilib_register_description_t));
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if (!regs) return PCILIB_ERROR_MEMORY;
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ctx->model_info.registers = regs;
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ctx->num_reg = n + n_present;
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ctx->alloc_reg = size;
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memcpy(ctx->model_info.registers, pcilib_model[ctx->model].registers, (n_present + 1) * sizeof(pcilib_register_description_t));
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n_present = ctx->num_reg;
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if ((n_present + n + 1) > ctx->alloc_reg) {
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for (size = ctx->alloc_reg; size < 2 * (n + n_present + 1); size<<=1);
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regs = (pcilib_register_description_t*)realloc(ctx->model_info.registers, size * sizeof(pcilib_register_description_t));
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if (!regs) return PCILIB_ERROR_MEMORY;
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ctx->model_info.registers = regs;
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ctx->alloc_reg = size;
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memcpy(ctx->model_info.registers + ctx->num_reg, ctx->model_info.registers + n_present, sizeof(pcilib_register_description_t));
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memcpy(ctx->model_info.registers + n_present, registers, n * sizeof(pcilib_register_description_t));
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pcilib_register_bank_t pcilib_find_bank_by_addr(pcilib_t *ctx, pcilib_register_bank_addr_t bank) {
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pcilib_register_bank_t i;
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pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
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pcilib_register_bank_description_t *banks = model_info->banks;
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for (i = 0; banks[i].access; i++)
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if (banks[i].addr == bank) return i;
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pcilib_register_bank_t pcilib_find_bank_by_name(pcilib_t *ctx, const char *bankname) {
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pcilib_register_bank_t i;
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pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
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pcilib_register_bank_description_t *banks = model_info->banks;
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for (i = 0; banks[i].access; i++)
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if (!strcasecmp(banks[i].name, bankname)) return i;
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pcilib_register_bank_t pcilib_find_bank(pcilib_t *ctx, const char *bank) {
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pcilib_register_bank_t res;
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pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
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pcilib_register_bank_description_t *banks = model_info->banks;
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if ((banks)&&(banks[0].access)) return (pcilib_register_bank_t)0;
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if (pcilib_isxnumber(bank)&&(sscanf(bank,"%lx", &addr) == 1)) {
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res = pcilib_find_bank_by_addr(ctx, addr);
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if (res != PCILIB_REGISTER_BANK_INVALID) return res;
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return pcilib_find_bank_by_name(ctx, bank);
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// FIXME create hash during map_register space
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pcilib_register_t pcilib_find_register(pcilib_t *ctx, const char *bank, const char *reg) {
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pcilib_register_bank_t bank_id;
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pcilib_register_bank_addr_t bank_addr = 0;
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pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
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pcilib_register_description_t *registers = model_info->registers;
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bank_id = pcilib_find_bank(ctx, bank);
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if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
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pcilib_error("Invalid bank (%s) is specified", bank);
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bank_addr = model_info->banks[bank_id].addr;
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for (i = 0; registers[i].bits; i++) {
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if ((!strcasecmp(registers[i].name, reg))&&((!bank)||(registers[i].bank == bank_addr))) return i;
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if ((ctx->model_info.dma_api)&&(!ctx->dma_ctx)&&(pcilib_get_dma_info(ctx))) {
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registers = model_info->registers;
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for (; registers[i].bits; i++) {
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if ((!strcasecmp(registers[i].name, reg))&&((!bank)||(registers[i].bank == bank_addr))) return i;
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return (pcilib_register_t)-1;
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static int pcilib_read_register_space_internal(pcilib_t *ctx, pcilib_register_bank_t bank, pcilib_register_addr_t addr, size_t n, pcilib_register_size_t offset, pcilib_register_size_t bits, pcilib_register_value_t *buf) {
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pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
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pcilib_register_bank_description_t *b = model_info->banks + bank;
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int access = b->access / 8;
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assert(bits < 8 * sizeof(pcilib_register_value_t));
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if (((addr + n) > b->size)||(((addr + n) == b->size)&&(bits))) {
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if ((b->format)&&(strchr(b->format, 'x')))
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pcilib_error("Accessing register (%u regs at addr 0x%x) out of register space (%u registers total)", bits?(n+1):n, addr, b->size);
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pcilib_error("Accessing register (%u regs at addr %u) out of register space (%u registers total)", bits?(n+1):n, addr, b->size);
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return PCILIB_ERROR_OUTOFRANGE;
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err = pcilib_map_register_space(ctx);
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pcilib_error("Failed to map the register space");
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//n += bits / b->access;
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for (i = 0; i < n; i++) {
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err = pcilib_protocol[b->protocol].read(ctx, b, addr + i * access, buf + i);
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if ((bits > 0)&&(!err)) {
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pcilib_register_value_t val = 0;
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err = pcilib_protocol[b->protocol].read(ctx, b, addr + n * access, &val);
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val = (val >> offset)&BIT_MASK(bits);
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memcpy(buf + n, &val, sizeof(pcilib_register_value_t));
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int pcilib_read_register_space(pcilib_t *ctx, const char *bank, pcilib_register_addr_t addr, size_t n, pcilib_register_value_t *buf) {
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pcilib_register_bank_t bank_id = pcilib_find_bank(ctx, bank);
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if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
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if (bank) pcilib_error("Invalid register bank is specified (%s)", bank);
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else pcilib_error("Register bank should be specified");
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return PCILIB_ERROR_INVALID_BANK;
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return pcilib_read_register_space_internal(ctx, bank_id, addr, n, 0, 0, buf);
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int pcilib_read_register_by_id(pcilib_t *ctx, pcilib_register_t reg, pcilib_register_value_t *value) {
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pcilib_register_size_t bits;
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pcilib_register_value_t res;
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pcilib_register_bank_t bank;
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pcilib_register_description_t *r;
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pcilib_register_bank_description_t *b;
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pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
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r = model_info->registers + reg;
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bank = pcilib_find_bank_by_addr(ctx, r->bank);
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if (bank == PCILIB_REGISTER_BANK_INVALID) return PCILIB_ERROR_INVALID_BANK;
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b = model_info->banks + bank;
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n = r->bits / b->access;
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bits = r->bits % b->access;
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pcilib_register_value_t buf[n + 1];
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err = pcilib_read_register_space_internal(ctx, bank, r->addr, n, r->offset, bits, buf);
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if ((b->endianess == PCILIB_BIG_ENDIAN)||((b->endianess == PCILIB_HOST_ENDIAN)&&(ntohs(1) == 1))) {
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pcilib_error("Big-endian byte order support is not implemented");
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return PCILIB_ERROR_NOTSUPPORTED;
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for (i = 0; i < n; i++) {
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res |= buf[i] << (i * b->access);
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int pcilib_read_register(pcilib_t *ctx, const char *bank, const char *regname, pcilib_register_value_t *value) {
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reg = pcilib_find_register(ctx, bank, regname);
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pcilib_error("Register (%s) is not found", regname);
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return PCILIB_ERROR_NOTFOUND;
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return pcilib_read_register_by_id(ctx, reg, value);
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static int pcilib_write_register_space_internal(pcilib_t *ctx, pcilib_register_bank_t bank, pcilib_register_addr_t addr, size_t n, pcilib_register_size_t offset, pcilib_register_size_t bits, pcilib_register_value_t rwmask, pcilib_register_value_t *buf) {
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pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
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pcilib_register_bank_description_t *b = model_info->banks + bank;
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int access = b->access / 8;
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assert(bits < 8 * sizeof(pcilib_register_value_t));
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if (((addr + n) > b->size)||(((addr + n) == b->size)&&(bits))) {
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if ((b->format)&&(strchr(b->format, 'x')))
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pcilib_error("Accessing register (%u regs at addr 0x%x) out of register space (%u registers total)", bits?(n+1):n, addr, b->size);
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pcilib_error("Accessing register (%u regs at addr %u) out of register space (%u registers total)", bits?(n+1):n, addr, b->size);
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return PCILIB_ERROR_OUTOFRANGE;
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err = pcilib_map_register_space(ctx);
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pcilib_error("Failed to map the register space");
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//n += bits / b->access;
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for (i = 0; i < n; i++) {
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err = pcilib_protocol[b->protocol].write(ctx, b, addr + i * access, buf[i]);
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if ((bits > 0)&&(!err)) {
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pcilib_register_value_t val = (buf[n]&BIT_MASK(bits))<<offset;
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pcilib_register_value_t mask = BIT_MASK(bits)<<offset;
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pcilib_register_value_t rval;
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err = pcilib_protocol[b->protocol].read(ctx, b, addr + n * access, &rval);
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val |= (rval & rwmask & ~mask);
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err = pcilib_protocol[b->protocol].write(ctx, b, addr + n * access, val);
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int pcilib_write_register_space(pcilib_t *ctx, const char *bank, pcilib_register_addr_t addr, size_t n, pcilib_register_value_t *buf) {
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pcilib_register_bank_t bank_id = pcilib_find_bank(ctx, bank);
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if (bank_id == PCILIB_REGISTER_BANK_INVALID) {
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if (bank) pcilib_error("Invalid register bank is specified (%s)", bank);
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else pcilib_error("Register bank should be specified");
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return PCILIB_ERROR_INVALID_BANK;
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return pcilib_write_register_space_internal(ctx, bank_id, addr, n, 0, 0, 0, buf);
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int pcilib_write_register_by_id(pcilib_t *ctx, pcilib_register_t reg, pcilib_register_value_t value) {
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pcilib_register_size_t bits;
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pcilib_register_bank_t bank;
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pcilib_register_value_t res;
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pcilib_register_description_t *r;
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pcilib_register_bank_description_t *b;
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pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);
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r = model_info->registers + reg;
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bank = pcilib_find_bank_by_addr(ctx, r->bank);
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if (bank == PCILIB_REGISTER_BANK_INVALID) return PCILIB_ERROR_INVALID_BANK;
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b = model_info->banks + bank;
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n = r->bits / b->access;
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bits = r->bits % b->access;
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pcilib_register_value_t buf[n + 1];
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memset(buf, 0, (n + 1) * sizeof(pcilib_register_value_t));
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if ((b->endianess == PCILIB_BIG_ENDIAN)||((b->endianess == PCILIB_HOST_ENDIAN)&&(ntohs(1) == 1))) {
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pcilib_error("Big-endian byte order support is not implemented");
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return PCILIB_ERROR_NOTSUPPORTED;
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if (b->access == sizeof(pcilib_register_value_t) * 8) {
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for (i = 0, res = value; (res > 0)&&(i <= n); ++i) {
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buf[i] = res & BIT_MASK(b->access);
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pcilib_error("Value %i is too big to fit in the register %s", value, r->name);
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return PCILIB_ERROR_OUTOFRANGE;
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err = pcilib_write_register_space_internal(ctx, bank, r->addr, n, r->offset, bits, r->rwmask, buf);
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int pcilib_write_register(pcilib_t *ctx, const char *bank, const char *regname, pcilib_register_value_t value) {
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reg = pcilib_find_register(ctx, bank, regname);
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pcilib_error("Register (%s) is not found", regname);
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return PCILIB_ERROR_NOTFOUND;
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return pcilib_write_register_by_id(ctx, reg, value);