/alps/pcitool : revision 315

77

MODE_BENCHMARK,

78

MODE_READ,

79

MODE_READ_REGISTER,

80

MODE_READ_PROPERTY,

80

81

MODE_WRITE,

81

82

MODE_WRITE_REGISTER,

83

MODE_WRITE_PROPERTY,

82

84

MODE_RESET,

83

85

MODE_GRAB,

84

86

MODE_START_DMA,

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195

{"timeout", required_argument, 0, OPT_TIMEOUT },

194

196

{"iterations", required_argument, 0, OPT_ITERATIONS },

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{"info", optional_argument, 0, OPT_INFO },

196

{"list", no_argument, 0, OPT_LIST },

198

{"list", optional_argument, 0, OPT_LIST },

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{"reset", no_argument, 0, OPT_RESET },

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{"benchmark", optional_argument, 0, OPT_BENCHMARK },

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{"read", optional_argument, 0, OPT_READ },

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" %s <mode> [options] [hex data]\n"

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" Modes:\n"

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" -i [target] - Device or Register (target) Info\n"

261

" -l[l] - List (detailed) Data Banks & Registers\n"

263

" -l[l] [bank|/branch] - List (detailed) Data Banks & Registers\n"

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" -r <addr|dmaX|reg[/unit]> - Read Data/Register\n"

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" -w <addr|dmaX|reg[/unit]> - Write Data/Register\n"

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" --benchmark <barX|dmaX> - Performance Evaluation\n"

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return 0;

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}

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void ListProperties(pcilib_t *handle, const char *branch, int details) {

412

int i;

413

pcilib_property_info_t *props;

414

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props = pcilib_get_property_list(handle, branch, 0);

416

if (!props) Error("Error getting properties");

417

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if (props[0].path) {

419

printf("Properties: \n");

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for (i = 0; props[i].path; i++) {

422

const char *mode;

423

const char *type;

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switch (props[i].type) {

426

case PCILIB_TYPE_LONG:

427

type = "int ";

428

break;

429

case PCILIB_TYPE_DOUBLE:

430

type = "float ";

431

break;

432

case PCILIB_TYPE_STRING:

433

type = "string ";

434

break;

435

case PCILIB_TYPE_INVALID:

436

type = NULL;

437

break;

438

default:

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type = "unknown";

440

}

441

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switch (props[i].mode) {

443

case PCILIB_ACCESS_RW:

444

mode = "RW";

445

break;

446

case PCILIB_ACCESS_R:

447

mode = "R ";

448

break;

449

case PCILIB_ACCESS_W:

450

mode = "W ";

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break;

452

default:

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mode = " ";

454

}

455

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if (type)

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printf(" (%s %s) ", type, mode);

458

else

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printf(" %12s", "");

460

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if (props[i].flags&PCILIB_LIST_FLAG_CHILDS)

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printf(" + ");

463

else

464

printf(" ");

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if (details > 0) {

467

printf("%s", props[i].name);

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if ((props[i].description)&&(props[i].description[0])) {

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printf(": %s", props[i].description);

470

}

471

} else {

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printf("%s", props[i].path);

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}

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printf("\n");

475

}

476

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printf("\n");

478

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pcilib_free_property_info(handle, props);

480

}

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}

483

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void List(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, int details) {

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int i, j, k;

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486

const pcilib_register_bank_description_t *banks;

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const pcilib_board_info_t *board_info = pcilib_get_board_info(handle);

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const pcilib_dma_description_t *dma_info = pcilib_get_dma_description(handle);

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for (i = 0; i < PCILIB_MAX_BARS; i++) {

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if (board_info->bar_length[i] > 0) {

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printf(" BAR %d - ", i);

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if ((bank)&&(bank != (char*)-1)) banks = NULL;

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else banks = model_info->banks;

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if (banks) {

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printf("Banks: \n");

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for (i = 0; banks[i].access; i++) {

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printf("\n");

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}

545

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ListProperties(handle, "/", details);

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if (bank == (char*)-1) events = NULL;

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else {

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events = model_info->events;

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1128

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int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *unit) {

1206

int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit) {

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int i;

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int err;

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const char *format;

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// Adding DMA registers

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pcilib_get_dma_description(handle);

1141

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1142

if (reg) {

1143

pcilib_register_t regid = pcilib_find_register(handle, bank, reg);

1144

1145

if (unit) {

1219

if (reg||view) {

1220

if (view) {

1146

1221

pcilib_value_t val = {0};

1147

err = pcilib_read_register_view(handle, bank, reg, unit, &val);

1148

if (err) Error("Error reading view %s of register %s", unit, reg);

1222

if (reg) {

1223

err = pcilib_read_register_view(handle, bank, reg, view, &val);

1224

if (err) Error("Error reading view %s of register %s", view, reg);

1225

} else {

1226

err = pcilib_get_property(handle, view, &val);

1227

if (err) Error("Error reading property %s", view);

1228

}

1149

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if (unit) {

1231

err = pcilib_convert_value_unit(handle, &val, unit);

1232

if (err) {

1233

if (reg) Error("Error converting view %s of register %s to unit %s", view, reg, unit);

1234

else Error("Error converting property %s to unit %s", view, unit);

1235

}

1236

}

1237

1150

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err = pcilib_convert_value_type(handle, &val, PCILIB_TYPE_STRING);

1151

if (err) Error("Error converting view %s of register %s to string", unit, reg);

1239

if (err) {

1240

if (reg) Error("Error converting view %s of register %s to string", view);

1241

else Error("Error converting property %s to string", view);

1242

}

1152

1243

1153

printf("%s = %s\n", reg, val.sval);

1244

printf("%s = %s", (reg?reg:view), val.sval);

1245

if ((val.unit)&&(strcasecmp(val.unit, "name")))

1246

printf(" %s", val.unit);

1247

printf("\n");

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1248

} else {

1249

pcilib_register_t regid = pcilib_find_register(handle, bank, reg);

1155

1250

bank_id = pcilib_find_register_bank_by_addr(handle, model_info->registers[regid].bank);

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format = model_info->banks[bank_id].format;

1157

1252

if (!format) format = "%lu";

1362

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1363

1458

}

1364

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1365

int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *unit, char **data) {

1460

int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, const char *bank, const char *reg, const char *view, const char *unit, char **data) {

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int err = 0;

1367

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pcilib_value_t val = {0};

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pcilib_register_value_t value, verify;

1370

1465

1371

pcilib_register_t regid = pcilib_find_register(handle, bank, reg);

1372

if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");

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1467

/*

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pcilib_register_bank_t bank_id;

1384

1477

err = pcilib_set_value_from_static_string(handle, &val, *data);

1385

1478

if (err) Error("Error (%i) setting value", err);

1386

1479

1387

if (unit) {

1388

err = pcilib_write_register_view(handle, bank, reg, unit, &val);

1389

if (err) Error("Error writting view %s of register %s", unit, reg);

1390

printf("%s is written\n ", reg);

1480

if (view) {

1481

if (unit)

1482

val.unit = unit;

1483

1484

if (reg) {

1485

err = pcilib_write_register_view(handle, bank, reg, view, &val);

1486

if (err) Error("Error writting view %s of register %s", view, reg);

1487

printf("%s is written\n ", reg);

1488

} else {

1489

err = pcilib_set_property(handle, view, &val);

1490

if (err) Error("Error setting property %s", view);

1491

printf("%s is written\n ", view);

1492

}

1391

1493

} else {

1494

pcilib_register_t regid = pcilib_find_register(handle, bank, reg);

1495

if (regid == PCILIB_REGISTER_INVALID) Error("Can't find register (%s) from bank (%s)", reg, bank?bank:"autodetected");

1496

1392

1497

value = pcilib_get_value_as_register_value(handle, &val, &err);

1393

1498

if (err) Error("Error (%i) parsing data value (%s)", *data);

1394

1499

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2863

pcilib_bar_t bar = PCILIB_BAR_DETECT;

2759

2864

const char *addr = NULL;

2760

2865

const char *reg = NULL;

2866

const char *view = NULL;

2761

2867

const char *unit = NULL;

2762

2868

const char *bank = NULL;

2763

2869

char **data = NULL;

2767

2873

const char *use = NULL;

2768

2874

const char *lock = NULL;

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2875

const char *info_target = NULL;

2876

const char *list_target = NULL;

2770

2877

size_t block = (size_t)-1;

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2878

pcilib_irq_type_t irq_type = PCILIB_IRQ_TYPE_ALL;

2772

2879

pcilib_irq_hw_source_t irq_source = PCILIB_IRQ_SOURCE_DEFAULT;

2813

2920

if (mode == MODE_LIST) details++;

2814

2921

else if (mode != MODE_INVALID) Usage(argc, argv, "Multiple operations are not supported");

2815

2922

2923

if (optarg) list_target = optarg;

2924

else if ((optind < argc)&&(argv[optind][0] != '-')) list_target = argv[optind++];

2925

2816

2926

mode = MODE_LIST;

2817

2927

break;

2818

2928

case OPT_RESET:

3302

3412

num_offset = dma_channel + 3;

3303

3413

itmp -= 3;

3304

3414

}

3305

3415

3306

3416

if (bank) {

3307

3417

if (strncmp(num_offset, bank, itmp)) Usage(argc, argv, "Conflicting DMA channels are specified in mode parameter (%s) and bank parameter (%s)", dma_channel, bank);

3308

3418

}

3309

3419

3310

3420

if (!isnumber_n(num_offset, itmp))

3311

3421

Usage(argc, argv, "Invalid DMA channel (%s) is specified", dma_channel);

3312

3422

3313

3423

dma = atoi(num_offset);

3314

3424

}

3315

3425

break;

3426

case MODE_LIST:

3427

if (bank&&list_target) {

3428

if (strcmp(list_target, bank))

3429

Usage(argc, argv, "Conflicting banks are specified in list parameter (%s) and bank parameter (%s)", list_target, bank);

3430

} else if (bank) {

3431

list_target = bank;

3432

}

3433

break;

3316

3434

default:

3317

3435

if (argc > optind) Usage(argc, argv, "Invalid non-option parameters are supplied");

3318

3436

}

3359

3477

}

3360

3478

}

3361

3479

} else {

3362

unit = strchr(addr, '/');

3363

if (!unit) unit = strchr(addr, ':');

3364

if (unit) {

3365

char *reg_name;

3366

size_t reg_size = strlen(addr) - strlen(unit);

3367

reg_name = alloca(reg_size + 1);

3368

memcpy(reg_name, addr, reg_size);

3369

reg_name[reg_size] = 0;

3370

reg = reg_name;

3371

unit++;

3480

view = strchr(addr, '/');

3481

unit = strchr((view?view:addr), ':');

3482

3483

if (view||unit) {

3484

size_t reg_size = strlen(addr) - strlen(view?view:unit);

3485

if (reg_size) reg = strndupa(addr, reg_size);

3486

else reg = NULL;

3487

3488

if ((reg)&&(view)) view++;

3489

if (unit) unit++;

3490

3491

if (view&&unit) {

3492

view = strndupa(view, strlen(view) - strlen(unit) - 1);

3493

} else if ((reg)&&(unit)) {

3494

view = unit;

3495

unit = NULL;

3496

}

3372

3497

} else {

3373

3498

reg = addr;

3374

3499

}

3375

3500

3376

if (pcilib_find_register(handle, bank, reg) == PCILIB_REGISTER_INVALID) {

3377

Usage(argc, argv, "Invalid address (%s) is specified", addr);

3501

if (reg) {

3502

if (pcilib_find_register(handle, bank, reg) == PCILIB_REGISTER_INVALID) {

3503

Usage(argc, argv, "Invalid address (%s) is specified", addr);

3504

} else {

3505

++mode;

3506

}

3378

3507

} else {

3379

++mode;

3508

mode += 2;

3380

3509

}

3381

3510

}

3382

3511

}

3458

3587

Info(handle, model_info, info_target);

3459

3588

break;

3460

3589

case MODE_LIST:

3461

List(handle, model_info, bank, details);

3590

if ((list_target)&&(*list_target == '/'))

3591

ListProperties(handle, list_target, details);

3592

else

3593

List(handle, model_info, list_target, details);

3462

3594

break;

3463

3595

case MODE_BENCHMARK:

3464

3596

Benchmark(handle, amode, dma, bar, start, size_set?size:0, access, iterations);

3475

3607

}

3476

3608

break;

3477

3609

case MODE_READ_REGISTER:

3478

if ((reg)||(!addr)) ReadRegister(handle, model_info, bank, reg, unit);

3610

case MODE_READ_PROPERTY:

3611

if ((reg)||(view)||(!addr)) ReadRegister(handle, model_info, bank, reg, view, unit);

3479

3612

else ReadRegisterRange(handle, model_info, bank, start, addr_shift, size, ofile);

3480

3613

break;

3481

3614

case MODE_WRITE:

3482

3615

WriteData(handle, amode, dma, bar, start, size, access, endianess, data, verify);

3483

3616

break;

3484

3617

case MODE_WRITE_REGISTER:

3485

if (reg) WriteRegister(handle, model_info, bank, reg, unit, data);

3618

case MODE_WRITE_PROPERTY:

3619

if (reg||view) WriteRegister(handle, model_info, bank, reg, view, unit, data);

3486

3620

else WriteRegisterRange(handle, model_info, bank, start, addr_shift, size, data);

3487

3621

break;

3488

3622

case MODE_RESET: