/alps/pcitool : revision 258

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Committer: Suren A. Chilingaryan
Date: 2015-05-05 13:27:22 UTC
Revision ID: csa@suren.me-20150505132722-rz47ppxkx39x2koj

Split bar manipulation and fifo operations in stand-alone source and publish kmem and bar headers

files added:
pcilib/bar.c

pcilib/bar.h

pcilib/fifo.c

pcilib/fifo.h

files modified:
apps/lorenzo_ipedma_test.c

apps/xilinx.c

pcilib/CMakeLists.txt

pcilib/pci.c

pcilib/pci.h

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added added

removed removed

pcilib/pci.c

#include "error.h"

#include "model.h"

#include "plugin.h"

#include "bar.h"

static int pcilib_detect_model(pcilib_t *ctx, const char *model) {

int i, j;

// how we reconcile the banks from event model and dma description? The banks specified in the DMA description should override corresponding banks of events...

if ((model)&&(!model_info)/*&&(no xml)*/)

return PCILIB_ERROR_NOTFOUND;

if (!model_info) {

if ((model)&&(strcasecmp(model, "pci"))/*&&(no xml)*/)

return PCILIB_ERROR_NOTFOUND;

ctx->model = strdup("pci");

}

return 0;

}

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return ctx->event_ctx;

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}

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static pcilib_bar_t pcilib_detect_bar(pcilib_t *ctx, uintptr_t addr, size_t size) {

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int n = 0;

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pcilib_bar_t i;

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const pcilib_board_info_t *board_info = pcilib_get_board_info(ctx);

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if (!board_info) return PCILIB_BAR_INVALID;

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for (i = 0; i < PCILIB_MAX_BARS; i++) {

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if (board_info->bar_length[i] > 0) {

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if ((addr >= board_info->bar_start[i])&&((board_info->bar_start[i] + board_info->bar_length[i]) >= (addr + size))) return i;

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if (n) n = -1;

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else n = i + 1;

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}

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}

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if (n > 0) return n - 1;

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return PCILIB_BAR_INVALID;

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}

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int pcilib_detect_address(pcilib_t *ctx, pcilib_bar_t *bar, uintptr_t *addr, size_t size) {

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const pcilib_board_info_t *board_info = pcilib_get_board_info(ctx);

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if (!board_info) return PCILIB_ERROR_NOTFOUND;

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if (*bar == PCILIB_BAR_DETECT) {

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*bar = pcilib_detect_bar(ctx, *addr, size);

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if (*bar == PCILIB_BAR_INVALID) {

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pcilib_error("The requested data block at address 0x%x with size %zu does not belongs to any available memory bank", *addr, size);

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return PCILIB_ERROR_NOTFOUND;

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}

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if (*addr < board_info->bar_start[*bar])

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*addr += board_info->bar_start[*bar];

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} else {

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if ((*addr < board_info->bar_start[*bar])||((board_info->bar_start[*bar] + board_info->bar_length[*bar]) < (((uintptr_t)*addr) + size))) {

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if ((board_info->bar_length[*bar]) >= (((uintptr_t)*addr) + size)) {

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*addr += board_info->bar_start[*bar];

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} else {

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pcilib_error("The requested data block at address 0x%x with size %zu does not belong the specified memory bank (Bar %i: starting at 0x%x with size 0x%x)", *addr, size, *bar, board_info->bar_start[*bar], board_info->bar_length[*bar]);

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return PCILIB_ERROR_NOTFOUND;

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}

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}

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}

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*addr -= board_info->bar_start[*bar];

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*addr += board_info->bar_start[*bar] & ctx->page_mask;

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return 0;

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}

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void *pcilib_map_bar(pcilib_t *ctx, pcilib_bar_t bar) {

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void *res;

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int ret;

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const pcilib_board_info_t *board_info = pcilib_get_board_info(ctx);

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if (!board_info) return NULL;

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if (ctx->bar_space[bar]) return ctx->bar_space[bar];

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ret = ioctl( ctx->handle, PCIDRIVER_IOC_MMAP_MODE, PCIDRIVER_MMAP_PCI );

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if (ret) {

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pcilib_error("PCIDRIVER_IOC_MMAP_MODE ioctl have failed", bar);

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return NULL;

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}

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ret = ioctl( ctx->handle, PCIDRIVER_IOC_MMAP_AREA, PCIDRIVER_BAR0 + bar );

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if (ret) {

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pcilib_error("PCIDRIVER_IOC_MMAP_AREA ioctl have failed for bank %i", bar);

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return NULL;

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}

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#ifdef PCILIB_FILE_IO

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file_io_handle = open("/root/data", O_RDWR);

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res = mmap( 0, board_info->bar_length[bar], PROT_WRITE | PROT_READ, MAP_SHARED, ctx->file_io_handle, 0 );

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#else

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res = mmap( 0, board_info->bar_length[bar], PROT_WRITE | PROT_READ, MAP_SHARED, ctx->handle, 0 );

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#endif

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if ((!res)||(res == MAP_FAILED)) {

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pcilib_error("Failed to mmap data bank %i", bar);

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return NULL;

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}

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return res;

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}

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void pcilib_unmap_bar(pcilib_t *ctx, pcilib_bar_t bar, void *data) {

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const pcilib_board_info_t *board_info = pcilib_get_board_info(ctx);

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if (!board_info) return;

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if (ctx->bar_space[bar]) return;

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munmap(data, board_info->bar_length[bar]);

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#ifdef PCILIB_FILE_IO

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close(ctx->file_io_handle);

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#endif

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}

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int pcilib_map_register_space(pcilib_t *ctx) {

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int err;

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pcilib_register_bank_t i;

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if (!ctx->reg_bar_mapped) {

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const pcilib_model_description_t *model_info = pcilib_get_model_description(ctx);

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const pcilib_register_bank_description_t *banks = model_info->banks;

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for (i = 0; ((banks)&&(banks[i].access)); i++) {

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// uint32_t buf[2];

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void *reg_space;

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pcilib_bar_t bar = banks[i].bar;

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if (bar == PCILIB_BAR_DETECT) {

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uintptr_t addr = banks[0].read_addr;

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err = pcilib_detect_address(ctx, &bar, &addr, 1);

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if (err) return err;

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if (!ctx->bar_space[bar]) {

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reg_space = pcilib_map_bar(ctx, bar);

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// pcilib_memcpy(&buf, reg_space, 8);

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if (reg_space) {

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ctx->bar_space[bar] = reg_space;

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} else {

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return PCILIB_ERROR_FAILED;

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}

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}

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} else if (!ctx->bar_space[bar]) {

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reg_space = pcilib_map_bar(ctx, bar);

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if (reg_space) {

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ctx->bar_space[bar] = reg_space;

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} else {

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return PCILIB_ERROR_FAILED;

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}

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// pcilib_memcpy(&buf, reg_space, 8);

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}

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if (!i) ctx->reg_bar = bar;

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}

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ctx->reg_bar_mapped = 1;

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}

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return 0;

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}

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int pcilib_map_data_space(pcilib_t *ctx, uintptr_t addr) {

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int err;

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pcilib_bar_t i;

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}

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}

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int pcilib_read(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr, size_t size, void *buf) {

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void *data;

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pcilib_detect_address(ctx, &bar, &addr, size);

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data = pcilib_map_bar(ctx, bar);

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pcilib_memcpy(buf, data + addr, size);

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pcilib_unmap_bar(ctx, bar, data);

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return 0;

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}

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int pcilib_write(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr, size_t size, void *buf) {

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void *data;

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pcilib_detect_address(ctx, &bar, &addr, size);

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data = pcilib_map_bar(ctx, bar);

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pcilib_memcpy(data + addr, buf, size);

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pcilib_unmap_bar(ctx, bar, data);

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return 0;

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}

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int pcilib_read_fifo(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr, uint8_t fifo_size, size_t n, void *buf) {

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int i;

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void *data;

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pcilib_detect_address(ctx, &bar, &addr, fifo_size);

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data = pcilib_map_bar(ctx, bar);

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for (i = 0; i < n; i++) {

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pcilib_memcpy(buf + i * fifo_size, data + addr, fifo_size);

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}

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pcilib_unmap_bar(ctx, bar, data);

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return 0;

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}

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int pcilib_write_fifo(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr, uint8_t fifo_size, size_t n, void *buf) {

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int i;

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void *data;

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pcilib_detect_address(ctx, &bar, &addr, fifo_size);

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data = pcilib_map_bar(ctx, bar);

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for (i = 0; i < n; i++) {

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pcilib_memcpy(data + addr, buf + i * fifo_size, fifo_size);

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}

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pcilib_unmap_bar(ctx, bar, data);

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return 0;

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}

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