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#define _PCILIB_DMA_IPE_C
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#include "ipe_private.h"
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#include "ipe_registers.h"
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#define WR(addr, value) { *(uint32_t*)(ctx->base_addr + addr) = value; }
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#define RD(addr, value) { value = *(uint32_t*)(ctx->base_addr + addr); }
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pcilib_dma_context_t *dma_ipe_init(pcilib_t *pcilib, pcilib_dma_modification_t type, void *arg) {
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pcilib_model_description_t *model_info = pcilib_get_model_description(pcilib);
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ipe_dma_t *ctx = malloc(sizeof(ipe_dma_t));
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memset(ctx, 0, sizeof(ipe_dma_t));
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memset(ctx->engine, 0, 2 * sizeof(pcilib_dma_engine_description_t));
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ctx->engine[0].addr = 0;
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ctx->engine[0].type = PCILIB_DMA_TYPE_PACKET;
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ctx->engine[0].direction = PCILIB_DMA_FROM_DEVICE;
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ctx->engine[0].addr_bits = 32;
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pcilib_set_dma_engine_description(pcilib, 0, &ctx->engine[0]);
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pcilib_set_dma_engine_description(pcilib, 1, NULL);
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pcilib_register_bank_t dma_bank = pcilib_find_bank_by_addr(pcilib, PCILIB_REGISTER_BANK_DMA);
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if (dma_bank == PCILIB_REGISTER_BANK_INVALID) {
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pcilib_error("DMA Register Bank could not be found");
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ctx->dma_bank = model_info->banks + dma_bank;
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ctx->base_addr = pcilib_resolve_register_address(pcilib, ctx->dma_bank->bar, ctx->dma_bank->read_addr);
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err = pcilib_add_registers(ctx->pcilib, 0, ipe_dma_registers);
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pcilib_error("Error adding DMA registers");
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return (pcilib_dma_context_t*)ctx;
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void dma_ipe_free(pcilib_dma_context_t *vctx) {
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ipe_dma_t *ctx = (ipe_dma_t*)vctx;
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dma_ipe_stop(vctx, PCILIB_DMA_ENGINE_ALL, PCILIB_DMA_FLAGS_DEFAULT);
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int dma_ipe_start(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags) {
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ipe_dma_t *ctx = (ipe_dma_t*)vctx;
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pcilib_kmem_flags_t kflags;
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pcilib_kmem_reuse_state_t reuse_desc, reuse_pages;
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volatile void *desc_va;
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volatile uint32_t *last_written_addr_ptr;
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pcilib_register_value_t value;
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if (dma == PCILIB_DMA_ENGINE_INVALID) return 0;
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else if (dma > 1) return PCILIB_ERROR_INVALID_BANK;
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if (!ctx->started) ctx->started = 1;
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if (flags&PCILIB_DMA_FLAG_PERSISTENT) ctx->preserve = 1;
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if (ctx->pages) return 0;
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kflags = PCILIB_KMEM_FLAG_REUSE|PCILIB_KMEM_FLAG_EXCLUSIVE|PCILIB_KMEM_FLAG_HARDWARE|(ctx->preserve?PCILIB_KMEM_FLAG_PERSISTENT:0);
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pcilib_kmem_handle_t *desc = pcilib_alloc_kernel_memory(ctx->pcilib, PCILIB_KMEM_TYPE_CONSISTENT, 1, IPEDMA_DESCRIPTOR_SIZE, IPEDMA_DESCRIPTOR_ALIGNMENT, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_RING, 0x00), kflags);
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pcilib_kmem_handle_t *pages = pcilib_alloc_kernel_memory(ctx->pcilib, PCILIB_KMEM_TYPE_DMA_C2S_PAGE, IPEDMA_DMA_PAGES, 0, 0, PCILIB_KMEM_USE(PCILIB_KMEM_USE_DMA_PAGES, 0x00), kflags);
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if (pages) pcilib_free_kernel_memory(ctx->pcilib, pages, 0);
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if (desc) pcilib_free_kernel_memory(ctx->pcilib, desc, 0);
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return PCILIB_ERROR_MEMORY;
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reuse_desc = pcilib_kmem_is_reused(ctx->pcilib, desc);
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reuse_pages = pcilib_kmem_is_reused(ctx->pcilib, pages);
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if (reuse_desc == reuse_pages) {
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if (reuse_desc & PCILIB_KMEM_REUSE_PARTIAL) pcilib_warning("Inconsistent DMA buffers are found (only part of required buffers is available), reinitializing...");
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else if (reuse_desc & PCILIB_KMEM_REUSE_REUSED) {
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if ((reuse_desc & PCILIB_KMEM_REUSE_PERSISTENT) == 0) pcilib_warning("Lost DMA buffers are found (non-persistent mode), reinitializing...");
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else if ((reuse_desc & PCILIB_KMEM_REUSE_HARDWARE) == 0) pcilib_warning("Lost DMA buffers are found (missing HW reference), reinitializing...");
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#ifndef IPEDMA_BUG_DMARD
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RD(IPEDMA_REG_PAGE_COUNT, value);
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if (value != IPEDMA_DMA_PAGES) pcilib_warning("Inconsistent DMA buffers are found (Number of allocated buffers (%lu) does not match current request (%lu)), reinitializing...", value + 1, IPEDMA_DMA_PAGES);
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#endif /* IPEDMA_BUG_DMARD */
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} else pcilib_warning("Inconsistent DMA buffers (modes of ring and page buffers does not match), reinitializing....");
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desc_va = pcilib_kmem_get_ua(ctx->pcilib, desc);
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if (ctx->mode64) last_written_addr_ptr = desc_va + 3 * sizeof(uint32_t);
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else last_written_addr_ptr = desc_va + 4 * sizeof(uint32_t);
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// Detect the current state of DMA engine
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#ifdef IPEDMA_BUG_DMARD
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FILE *f = fopen("/tmp/pcitool_lastread", "r");
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if (!f) pcilib_error("Can't read current status");
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fread(&value, 1, sizeof(pcilib_register_value_t), f);
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#else /* IPEDMA_BUG_DMARD */
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RD(IPEDMA_REG_LAST_READ, value);
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// Numbered from 1 in FPGA
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#endif /* IPEDMA_BUG_DMARD */
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ctx->last_read = value;
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WR(IPEDMA_REG_CONTROL, 0x0);
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WR(IPEDMA_REG_RESET, 0x1);
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WR(IPEDMA_REG_RESET, 0x0);
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#ifndef IPEDMA_BUG_DMARD
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// Verify PCIe link status
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RD(IPEDMA_REG_RESET, value);
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if (value != 0x14031700) pcilib_warning("PCIe is not ready, code is %lx", value);
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#endif /* IPEDMA_BUG_DMARD */
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// Enable 64 bit addressing and configure TLP and PACKET sizes (40 bit mode can be used with big pre-allocated buffers later)
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if (ctx->mode64) address64 = 0x8000 | (0<<24);
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WR(IPEDMA_REG_TLP_SIZE, address64 | IPEDMA_TLP_SIZE);
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WR(IPEDMA_REG_TLP_COUNT, IPEDMA_PAGE_SIZE / (4 * IPEDMA_TLP_SIZE * IPEDMA_CORES));
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// Setting progress register threshold
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WR(IPEDMA_REG_UPDATE_THRESHOLD, IPEDMA_DMA_PROGRESS_THRESHOLD);
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// Reseting configured DMA pages
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WR(IPEDMA_REG_PAGE_COUNT, 0);
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// Setting current read position and configuring progress register
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WR(IPEDMA_REG_LAST_READ, IPEDMA_DMA_PAGES);
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WR(IPEDMA_REG_UPDATE_ADDR, pcilib_kmem_get_block_ba(ctx->pcilib, desc, 0));
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// Instructing DMA engine that writting should start from the first DMA page
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*last_written_addr_ptr = 0;//htonl(pcilib_kmem_get_block_ba(ctx->pcilib, pages, IPEDMA_DMA_PAGES - 1));
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for (i = 0; i < IPEDMA_DMA_PAGES; i++) {
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uintptr_t bus_addr_check, bus_addr = pcilib_kmem_get_block_ba(ctx->pcilib, pages, i);
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WR(IPEDMA_REG_PAGE_ADDR, bus_addr);
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if (bus_addr%4096) printf("Bad address %lu: %lx\n", i, bus_addr);
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RD(IPEDMA_REG_PAGE_ADDR, bus_addr_check);
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if (bus_addr_check != bus_addr) {
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pcilib_error("Written (%x) and read (%x) bus addresses does not match\n", bus_addr, bus_addr_check);
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WR(IPEDMA_REG_CONTROL, 0x1);
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ctx->last_read = IPEDMA_DMA_PAGES - 1;
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#ifdef IPEDMA_BUG_DMARD
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FILE *f = fopen("/tmp/pcitool_lastread", "w");
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if (!f) pcilib_error("Can't write current status");
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value = ctx->last_read;
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fwrite(&value, 1, sizeof(pcilib_register_value_t), f);
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#endif /* IPEDMA_BUG_DMARD */
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// ctx->last_read_addr = htonl(pcilib_kmem_get_block_ba(ctx->pcilib, pages, ctx->last_read));
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ctx->last_read_addr = pcilib_kmem_get_block_ba(ctx->pcilib, pages, ctx->last_read);
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ctx->page_size = pcilib_kmem_get_block_size(ctx->pcilib, pages, 0);;
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ctx->ring_size = IPEDMA_DMA_PAGES;
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int dma_ipe_stop(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma_flags_t flags) {
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pcilib_kmem_flags_t kflags;
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ipe_dma_t *ctx = (ipe_dma_t*)vctx;
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if (!ctx->started) return 0;
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if ((dma != PCILIB_DMA_ENGINE_INVALID)&&(dma > 1)) return PCILIB_ERROR_INVALID_BANK;
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// ignoring previous setting if flag specified
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if (flags&PCILIB_DMA_FLAG_PERSISTENT) {
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kflags = PCILIB_KMEM_FLAG_REUSE;
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kflags = PCILIB_KMEM_FLAG_HARDWARE|PCILIB_KMEM_FLAG_PERSISTENT;
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WR(IPEDMA_REG_CONTROL, 0);
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WR(IPEDMA_REG_RESET, 0x1);
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WR(IPEDMA_REG_RESET, 0x0);
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// Reseting configured DMA pages
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WR(IPEDMA_REG_PAGE_COUNT, 0);
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pcilib_free_kernel_memory(ctx->pcilib, ctx->desc, kflags);
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pcilib_free_kernel_memory(ctx->pcilib, ctx->pages, kflags);
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int dma_ipe_get_status(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dma_engine_status_t *status, size_t n_buffers, pcilib_dma_buffer_status_t *buffers) {
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ipe_dma_t *ctx = (ipe_dma_t*)vctx;
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void *desc_va = (void*)pcilib_kmem_get_ua(ctx->pcilib, ctx->desc);
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uint32_t *last_written_addr_ptr;
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uint32_t last_written_addr;
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if (!status) return -1;
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if (ctx->mode64) last_written_addr_ptr = desc_va + 3 * sizeof(uint32_t);
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else last_written_addr_ptr = desc_va + 4 * sizeof(uint32_t);
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last_written_addr = *last_written_addr_ptr;
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status->started = ctx->started;
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status->ring_size = ctx->ring_size;
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status->buffer_size = ctx->page_size;
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// For simplicity, we keep last_read here, and fix in the end
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status->ring_tail = ctx->last_read;
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// Find where the ring head is actually are
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for (i = 0; i < ctx->ring_size; i++) {
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uintptr_t bus_addr = pcilib_kmem_get_block_ba(ctx->pcilib, ctx->pages, i);
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if (bus_addr == last_written_addr) {
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status->ring_head = i;
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if (i == ctx->ring_size) {
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if (last_written_addr) {
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pcilib_warning("DMA is in unknown state, last_written_addr does not correspond any of available buffers");
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status->ring_head = 0;
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status->ring_tail = 0;
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if (n_buffers > ctx->ring_size) n_buffers = ctx->ring_size;
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memset(buffers, 0, n_buffers * sizeof(pcilib_dma_buffer_status_t));
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if (status->ring_head >= status->ring_tail) {
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for (i = status->ring_tail + 1; (i <= status->ring_head)&&(i < n_buffers); i++) {
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buffers[i].size = ctx->page_size;
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buffers[i].first = 1;
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for (i = 0; (i <= status->ring_head)&&(i < n_buffers); i++) {
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buffers[i].size = ctx->page_size;
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buffers[i].first = 1;
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for (i = status->ring_tail + 1; (i < status->ring_size)&&(i < n_buffers); i++) {
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buffers[i].size = ctx->page_size;
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buffers[i].first = 1;
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// We actually keep last_read in the ring_tail, so need to increase
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if (status->ring_tail != status->ring_head) {
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if (status->ring_tail == status->ring_size) status->ring_tail = 0;
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int dma_ipe_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uintptr_t addr, size_t size, pcilib_dma_flags_t flags, pcilib_timeout_t timeout, pcilib_dma_callback_t cb, void *cbattr) {
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int err, ret = PCILIB_STREAMING_REQ_PACKET;
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pcilib_timeout_t wait = 0;
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struct timeval start, cur;
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volatile void *desc_va;
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volatile uint32_t *last_written_addr_ptr;
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volatile uint32_t *empty_detected_ptr;
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pcilib_dma_flags_t packet_flags = PCILIB_DMA_FLAG_EOP;
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#ifdef IPEDMA_BUG_DMARD
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pcilib_register_value_t value;
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#endif /* IPEDMA_BUG_DMARD */
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ipe_dma_t *ctx = (ipe_dma_t*)vctx;
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err = dma_ipe_start(vctx, dma, PCILIB_DMA_FLAGS_DEFAULT);
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desc_va = (void*)pcilib_kmem_get_ua(ctx->pcilib, ctx->desc);
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if (ctx->mode64) last_written_addr_ptr = desc_va + 3 * sizeof(uint32_t);
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else last_written_addr_ptr = desc_va + 4 * sizeof(uint32_t);
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empty_detected_ptr = last_written_addr_ptr - 2;
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switch (ret&PCILIB_STREAMING_TIMEOUT_MASK) {
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case PCILIB_STREAMING_CONTINUE:
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// Hardware indicates that there is no more data pending and we can safely stop if there is no data in the kernel buffers already
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#ifdef IPEDMA_SUPPORT_EMPTY_DETECTED
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if (*empty_detected_ptr)
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#endif /* IPEDMA_SUPPORT_EMPTY_DETECTED */
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wait = IPEDMA_DMA_TIMEOUT;
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case PCILIB_STREAMING_WAIT:
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wait = (timeout > IPEDMA_DMA_TIMEOUT)?timeout:IPEDMA_DMA_TIMEOUT;
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// case PCILIB_STREAMING_CHECK: wait = 0; break;
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printf("Waiting for data: %u (last read) 0x%x (last read addr) 0x%x (last_written)\n", ctx->last_read, ctx->last_read_addr, *last_written_addr_ptr);
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#endif /* IPEDMA_DEBUG */
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gettimeofday(&start, NULL);
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memcpy(&cur, &start, sizeof(struct timeval));
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while (((*last_written_addr_ptr == 0)||(ctx->last_read_addr == (*last_written_addr_ptr)))&&((wait == PCILIB_TIMEOUT_INFINITE)||(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < wait))) {
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#ifdef IPEDMA_SUPPORT_EMPTY_DETECTED
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if ((ret != PCILIB_STREAMING_REQ_PACKET)&&(*empty_detected_ptr)) break;
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#endif /* IPEDMA_SUPPORT_EMPTY_DETECTED */
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gettimeofday(&cur, NULL);
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// Failing out if we exited on timeout
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if ((ctx->last_read_addr == (*last_written_addr_ptr))||(*last_written_addr_ptr == 0)) {
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#ifdef IPEDMA_SUPPORT_EMPTY_DETECTED
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if ((wait)&&(*last_written_addr_ptr)&&(!*empty_detected_ptr))
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pcilib_warning("The empty_detected flag is not set, but no data arrived within %lu us\n", wait);
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# endif /* IPEDMA_DEBUG */
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#endif /* IPEDMA_SUPPORT_EMPTY_DETECTED */
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return (ret&PCILIB_STREAMING_FAIL)?PCILIB_ERROR_TIMEOUT:0;
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// Getting next page to read
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cur_read = ctx->last_read + 1;
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if (cur_read == ctx->ring_size) cur_read = 0;
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printf("Reading: %u (last read) 0x%x (last read addr) 0x%x (last_written)\n", cur_read, ctx->last_read_addr, *last_written_addr_ptr);
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#endif /* IPEDMA_DEBUG */
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#ifdef IPEDMA_DETECT_PACKETS
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if ((*empty_detected_ptr)&&(pcilib_kmem_get_block_ba(ctx->pcilib, ctx->pages, cur_read) == (*last_written_addr_ptr))) packet_flags = PCILIB_DMA_FLAG_EOP;
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else packet_flags = 0;
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#endif /* IPEDMA_DETECT_PACKETS */
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pcilib_kmem_sync_block(ctx->pcilib, ctx->pages, PCILIB_KMEM_SYNC_FROMDEVICE, cur_read);
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void *buf = pcilib_kmem_get_block_ua(ctx->pcilib, ctx->pages, cur_read);
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ret = cb(cbattr, packet_flags, ctx->page_size, buf);
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if (ret < 0) return -ret;
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// DS: Fixme, it looks like we can avoid calling this for the sake of performance
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// pcilib_kmem_sync_block(ctx->pcilib, ctx->pages, PCILIB_KMEM_SYNC_TODEVICE, cur_read);
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WR(IPEDMA_REG_LAST_READ, cur_read + 1);
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ctx->last_read = cur_read;
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// ctx->last_read_addr = htonl(pcilib_kmem_get_block_ba(ctx->pcilib, ctx->pages, cur_read));
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ctx->last_read_addr = pcilib_kmem_get_block_ba(ctx->pcilib, ctx->pages, cur_read);
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#ifdef IPEDMA_BUG_DMARD
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FILE *f = fopen("/tmp/pcitool_lastread", "w");
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if (!f) pcilib_error("Can't write current status");
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fwrite(&value, 1, sizeof(pcilib_register_value_t), f);
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#endif /* IPEDMA_BUG_DMARD */
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double dma_ipe_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dma, uintptr_t addr, size_t size, size_t iterations, pcilib_dma_direction_t direction) {
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ipe_dma_t *ctx = (ipe_dma_t*)vctx;
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struct timeval start, cur;
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size_t bytes, rbytes;
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if ((direction == PCILIB_DMA_TO_DEVICE)||(direction == PCILIB_DMA_BIDIRECTIONAL)) return -1.;
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if ((dma != PCILIB_DMA_ENGINE_INVALID)&&(dma > 1)) return -1.;
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err = dma_ipe_start(vctx, 0, PCILIB_DMA_FLAGS_DEFAULT);
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WR(IPEDMA_REG_CONTROL, 0x0);
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err = pcilib_skip_dma(ctx->pcilib, 0);
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pcilib_error("Can't start benchmark, devices continuously writes unexpected data using DMA engine");
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if (size%IPEDMA_PAGE_SIZE) size = (1 + size / IPEDMA_PAGE_SIZE) * IPEDMA_PAGE_SIZE;
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// Allocate memory and prepare data
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for (iter = 0; iter < iterations; iter++) {
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gettimeofday(&start, NULL);
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WR(IPEDMA_REG_CONTROL, 0x1);
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for (bytes = 0; bytes < size; bytes += rbytes) {
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err = pcilib_read_dma(ctx->pcilib, 0, addr, size - bytes, buf + bytes, &rbytes);
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pcilib_error("Can't read data from DMA, error %i", err);
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WR(IPEDMA_REG_CONTROL, 0x0);
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gettimeofday(&cur, NULL);
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us += ((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec));
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err = pcilib_skip_dma(ctx->pcilib, 0);
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pcilib_error("Can't start iteration, devices continuously writes unexpected data using DMA engine");
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return err?-1:((1. * size * iterations * 1000000) / (1024. * 1024. * us));