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-rw-r--r--pcilib/pci.h17
1 files changed, 12 insertions, 5 deletions
diff --git a/pcilib/pci.h b/pcilib/pci.h
index 88327b3..ff18e52 100644
--- a/pcilib/pci.h
+++ b/pcilib/pci.h
@@ -40,22 +40,25 @@ typedef struct {
} pcilib_pcie_link_info_t;
struct pcilib_view_context_s {
- UT_hash_handle hh;
+ const char *name;
pcilib_view_t view;
-// pcilib_view_description_t desc; /**< We will allocate more memory and store actual description instance here, so it should be the last member */
-};
+ UT_hash_handle hh;
+};
struct pcilib_unit_context_s {
- UT_hash_handle hh;
+ const char *name;
pcilib_unit_t unit;
-// pcilib_unit_description_t desc;
+ UT_hash_handle hh;
};
typedef struct {
+ const char *name; /**< Register name */
+ pcilib_register_t reg; /**< Register index */
pcilib_register_bank_t bank; /**< Reference to bank containing the register */
pcilib_register_value_t min, max; /**< Minimum & maximum allowed values */
pcilib_xml_node_t *xml; /**< Additional XML properties */
pcilib_view_reference_t *views; /**< For non-static list of views, this vairables holds a copy of a NULL-terminated list from model (if present, memory should be de-allocated) */
+ UT_hash_handle hh;
} pcilib_register_context_t;
struct pcilib_s {
@@ -104,6 +107,10 @@ struct pcilib_s {
pcilib_view_description_t **views; /**< list of currently defined views */
pcilib_unit_description_t *units; /**< list of currently defined units */
+ pcilib_unit_context_t *unit_hash; /**< Hash of units */
+ pcilib_view_context_t *view_hash; /**< Hash of views */
+ pcilib_register_context_t *reg_hash; /**< Hash of registers */
+
pcilib_lock_t *dma_rlock[PCILIB_MAX_DMA_ENGINES]; /**< Per-engine locks to serialize streaming and read operations */
pcilib_lock_t *dma_wlock[PCILIB_MAX_DMA_ENGINES]; /**< Per-engine locks to serialize write operations */