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-rw-r--r--dma/ipe.c38
-rw-r--r--dma/ipe_benchmark.c7
-rw-r--r--dma/ipe_private.h3
3 files changed, 7 insertions, 41 deletions
diff --git a/dma/ipe.c b/dma/ipe.c
index fc75fb3..a9ecc90 100644
--- a/dma/ipe.c
+++ b/dma/ipe.c
@@ -37,29 +37,8 @@ pcilib_dma_context_t *dma_ipe_init(pcilib_t *pcilib, const char *model, const vo
ctx->mode64 = 1;
#endif /* IPEDMA_64BIT_MODE */
-/*
- memset(ctx->engine, 0, 2 * sizeof(pcilib_dma_engine_description_t));
- ctx->engine[0].addr = 0;
- ctx->engine[0].type = PCILIB_DMA_TYPE_PACKET;
- ctx->engine[0].direction = PCILIB_DMA_FROM_DEVICE;
- ctx->engine[0].addr_bits = 32;
- pcilib_set_dma_engine_description(pcilib, 0, &ctx->engine[0]);
- pcilib_set_dma_engine_description(pcilib, 1, NULL);
-*/
-
pcilib_register_bank_t dma_bank = pcilib_find_register_bank_by_addr(pcilib, PCILIB_REGISTER_BANK_DMA);
-/*
- if (dma_bank == PCILIB_REGISTER_BANK_INVALID) {
- err = pcilib_add_register_banks(ctx->pcilib, 0, ipe_dma_register_banks);
- if (err) {
- free(ctx);
- pcilib_error("Error (%i) adding DMA register bank");
- return NULL;
- }
- }
- dma_bank = pcilib_find_bank_by_addr(pcilib, PCILIB_REGISTER_BANK_DMA);
-*/
if (dma_bank == PCILIB_REGISTER_BANK_INVALID) {
free(ctx);
pcilib_error("DMA Register Bank could not be found");
@@ -68,15 +47,6 @@ pcilib_dma_context_t *dma_ipe_init(pcilib_t *pcilib, const char *model, const vo
ctx->dma_bank = model_info->banks + dma_bank;
ctx->base_addr = pcilib_resolve_register_address(pcilib, ctx->dma_bank->bar, ctx->dma_bank->read_addr);
-
-/*
- err = pcilib_add_registers(ctx->pcilib, 0, ipe_dma_registers);
- if (err) {
- free(ctx);
- pcilib_error("Error adding DMA registers");
- return NULL;
- }
-*/
}
return (pcilib_dma_context_t*)ctx;
@@ -229,8 +199,7 @@ int dma_ipe_start(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dm
WR(IPEDMA_REG_UPDATE_ADDR, pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, desc, 0));
// Instructing DMA engine that writting should start from the first DMA page
- *last_written_addr_ptr = 0;//htonl(pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, pages, IPEDMA_DMA_PAGES - 1));
-
+ *last_written_addr_ptr = 0;
for (i = 0; i < IPEDMA_DMA_PAGES; i++) {
uintptr_t bus_addr_check, bus_addr = pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, pages, i);
@@ -259,10 +228,8 @@ int dma_ipe_start(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, pcilib_dm
#endif /* IPEDMA_BUG_DMARD */
}
-// ctx->last_read_addr = htonl(pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, pages, ctx->last_read));
ctx->last_read_addr = pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, pages, ctx->last_read);
-
ctx->desc = desc;
ctx->pages = pages;
ctx->page_size = pcilib_kmem_get_block_size(ctx->dmactx.pcilib, pages, 0);
@@ -534,7 +501,7 @@ int dma_ipe_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uin
ret = cb(cbattr, packet_flags, ctx->page_size, buf);
if (ret < 0) return -ret;
-// DS: Fixme, it looks like we can avoid calling this for the sake of performance
+ // We don't need this because hardwaredoes not intend to read anything from the memory
// pcilib_kmem_sync_block(ctx->dmactx.pcilib, ctx->pages, PCILIB_KMEM_SYNC_TODEVICE, cur_read);
// Numbered from 1
@@ -551,7 +518,6 @@ int dma_ipe_stream_read(pcilib_dma_context_t *vctx, pcilib_dma_engine_t dma, uin
ctx->last_read = cur_read;
-// ctx->last_read_addr = htonl(pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, ctx->pages, cur_read));
ctx->last_read_addr = pcilib_kmem_get_block_ba(ctx->dmactx.pcilib, ctx->pages, cur_read);
#ifdef IPEDMA_BUG_DMARD
diff --git a/dma/ipe_benchmark.c b/dma/ipe_benchmark.c
index 3c10715..f8e0a7e 100644
--- a/dma/ipe_benchmark.c
+++ b/dma/ipe_benchmark.c
@@ -146,13 +146,13 @@ double dma_ipe_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
pcilib_info_once("Benchmarking the DMA hardware (without memcpy)");
WR(IPEDMA_REG_CONTROL, 0x0);
-
+/*
err = pcilib_skip_dma(ctx->dmactx.pcilib, 0);
if (err) {
pcilib_error("Can't start benchmark, devices continuously writes unexpected data using DMA engine");
return -1;
}
-
+*/
// Allocate memory and prepare data
buf = malloc(size);
if (!buf) return -1;
@@ -177,12 +177,13 @@ double dma_ipe_benchmark(pcilib_dma_context_t *vctx, pcilib_dma_engine_addr_t dm
gettimeofday(&cur, NULL);
us += ((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec));
-
+/*
err = pcilib_skip_dma(ctx->dmactx.pcilib, 0);
if (err) {
pcilib_error("Can't start iteration, devices continuously writes unexpected data using DMA engine");
break;
}
+*/
}
}
diff --git a/dma/ipe_private.h b/dma/ipe_private.h
index ae5df1c..5cfb10b 100644
--- a/dma/ipe_private.h
+++ b/dma/ipe_private.h
@@ -9,7 +9,7 @@
//#define IPEDMA_TLP_SIZE 128 /**< If set, enforces the specified TLP size */
#define IPEDMA_PAGE_SIZE 4096
-#define IPEDMA_DMA_PAGES 32 /**< number of DMA pages in the ring buffer to allocate */
+#define IPEDMA_DMA_PAGES 1024 /**< number of DMA pages in the ring buffer to allocate */
#define IPEDMA_DMA_PROGRESS_THRESHOLD 1 /**< how many pages the DMA engine should fill before reporting progress */
#define IPEDMA_DESCRIPTOR_SIZE 128
#define IPEDMA_DESCRIPTOR_ALIGNMENT 64
@@ -35,7 +35,6 @@
#define IPEDMA_REG_PAGE_COUNT 0x5C
#define IPEDMA_REG_UPDATE_THRESHOLD 0x60
-
#define WR(addr, value) { *(uint32_t*)(ctx->base_addr + addr) = value; }
#define RD(addr, value) { value = *(uint32_t*)(ctx->base_addr + addr); }