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author | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-07-11 01:37:54 +0200 |
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committer | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-07-11 01:37:54 +0200 |
commit | c095f06560a0efacc7a34ea4e7f1e69c1faab0cf (patch) | |
tree | c005686153325eadb3d5c97617154f0acba75fbb /register.c | |
parent | 02924fc49641ca9c000054a7a540b6f1eaa0e8f8 (diff) | |
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IRQ support in NWL DMA engine
Diffstat (limited to 'register.c')
-rw-r--r-- | register.c | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -26,6 +26,8 @@ int pcilib_add_registers(pcilib_t *ctx, size_t n, pcilib_register_description_t } + if (pcilib_model[ctx->model].registers) + if (ctx->model_info.registers == pcilib_model[ctx->model].registers) { for (n_present = 0; ctx->model_info.registers[n_present].bits; n_present++); for (size = 1024; size < 2 * (n + n_present + 1); size<<=1); |