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| author | Vasilii Chernov <vchernov@inr.ru> | 2016-02-11 14:24:01 +0100 |
|---|---|---|
| committer | Vasilii Chernov <vchernov@inr.ru> | 2016-02-11 14:24:01 +0100 |
| commit | d7fc669bf0dbe37f46d2efec4940feb8504017c2 (patch) | |
| tree | 7075ee0851d52f9e448be3ff084dde1c35014558 /pcitool/cli.c | |
| parent | 76ee5a167add1c169a982ab59aa0544f827cb365 (diff) | |
Change no_set_check parameter name. Move Python wrap to separate directory.
Diffstat (limited to 'pcitool/cli.c')
| -rw-r--r-- | pcitool/cli.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/pcitool/cli.c b/pcitool/cli.c index cb87dcb..3e69aac 100644 --- a/pcitool/cli.c +++ b/pcitool/cli.c @@ -1706,7 +1706,7 @@ int WriteRegister(pcilib_t *handle, const pcilib_model_description_t *model_info err = pcilib_read_register(handle, bank, reg, &verify); if (err) Error("Error reading back register %s for verification\n", reg); - if (!((model_info->registers[regid].mode&PCILIB_REGISTER_NO_CHK) == PCILIB_REGISTER_NO_CHK) && + if (!((model_info->registers[regid].mode&PCILIB_REGISTER_INCONSISTENT) == PCILIB_REGISTER_INCONSISTENT) && verify != value) { Error("Failed to write register %s: %lu is written and %lu is read back", reg, value, verify); } else { |