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| author | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-07-17 23:10:20 +0200 |
|---|---|---|
| committer | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-07-17 23:10:20 +0200 |
| commit | 268dfaa6674b3e1c4d5fbc605aea4a55ae2aa193 (patch) | |
| tree | d7803ceac0ed5b5dd3ccea2a476de042fd44081f /dma | |
| parent | ad4a1e15877aff3da889c0c433475d3173a677e4 (diff) | |
| download | pcitool-268dfaa6674b3e1c4d5fbc605aea4a55ae2aa193.tar.gz pcitool-268dfaa6674b3e1c4d5fbc605aea4a55ae2aa193.tar.bz2 pcitool-268dfaa6674b3e1c4d5fbc605aea4a55ae2aa193.tar.xz pcitool-268dfaa6674b3e1c4d5fbc605aea4a55ae2aa193.zip | |
Do not try to verify write-only registers
Diffstat (limited to 'dma')
| -rw-r--r-- | dma/nwl_register.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dma/nwl_register.h b/dma/nwl_register.h index 926f093..89a8632 100644 --- a/dma/nwl_register.h +++ b/dma/nwl_register.h @@ -59,7 +59,7 @@ static pcilib_register_description_t nwl_dma_engine_registers[] = { {0x0004, 10, 1, 0, 0x0000C100, PCILIB_REGISTER_R , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_running", ""}, {0x0004, 11, 1, 0, 0x0000C100, PCILIB_REGISTER_R , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_waiting", ""}, {0x0004, 14, 1, 0, 0x0000C100, PCILIB_REGISTER_RW , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset_request", ""}, - {0x0004, 15, 1, 0, 0x0000C100, PCILIB_REGISTER_RW , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset", ""}, + {0x0004, 15, 1, 0, 0x0000C100, PCILIB_REGISTER_W , PCILIB_REGISTER_BITS, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_reset", ""}, {0x0008, 0, 32, 0, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_next_descriptor", ""}, {0x000C, 0, 32, 0, 0x00000000, PCILIB_REGISTER_RW , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_sw_descriptor", ""}, {0x0010, 0, 32, 0, 0x00000000, PCILIB_REGISTER_R , PCILIB_REGISTER_STANDARD, PCILIB_REGISTER_BANK_DMA, "dma%0*u%s_last_descriptor", ""}, |