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author | Suren A. Chilingaryan <csa@suren.me> | 2016-03-02 02:49:28 +0100 |
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committer | Suren A. Chilingaryan <csa@suren.me> | 2016-03-02 02:49:28 +0100 |
commit | 3c58980b3ca558096340e51c215897e8614ba00a (patch) | |
tree | 54d5f8cf48c7331586ed110a548b33b161f8093e /dma/nwl_engine.c | |
parent | adc657ebcd01ecc2cc5f110453ef00dffde2d5c0 (diff) | |
parent | a5da7db50d02878b6d9c844b18d0d3f8ccf6c62b (diff) | |
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Distinguish between hardware and bus addresses in pcilib and fix cli reading from DMA when very low DMA timeout is set
Diffstat (limited to 'dma/nwl_engine.c')
-rw-r--r-- | dma/nwl_engine.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/dma/nwl_engine.c b/dma/nwl_engine.c index c3dea49..b098943 100644 --- a/dma/nwl_engine.c +++ b/dma/nwl_engine.c @@ -124,7 +124,7 @@ int dma_nwl_start_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) { dma_nwl_acknowledge_irq((pcilib_dma_context_t*)ctx, PCILIB_DMA_IRQ, dma); - ring_pa = pcilib_kmem_get_pa(ctx->dmactx.pcilib, ectx->ring); + ring_pa = pcilib_kmem_get_ba(ctx->dmactx.pcilib, ectx->ring); nwl_write_register(ring_pa, ctx, ectx->base_addr, REG_DMA_ENG_NEXT_BD); nwl_write_register(ring_pa, ctx, ectx->base_addr, REG_SW_NEXT_BD); @@ -188,7 +188,7 @@ int dma_nwl_stop_engine(nwl_dma_t *ctx, pcilib_dma_engine_t dma) { } while ((val & (DMA_ENG_RUNNING))&&(((cur.tv_sec - start.tv_sec)*1000000 + (cur.tv_usec - start.tv_usec)) < PCILIB_NWL_REGISTER_TIMEOUT)); if (ectx->ring) { - ring_pa = pcilib_kmem_get_pa(ctx->dmactx.pcilib, ectx->ring); + ring_pa = pcilib_kmem_get_ba(ctx->dmactx.pcilib, ectx->ring); nwl_write_register(ring_pa, ctx, ectx->base_addr, REG_DMA_ENG_NEXT_BD); nwl_write_register(ring_pa, ctx, ectx->base_addr, REG_SW_NEXT_BD); } |