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author | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-03-09 16:55:27 +0100 |
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committer | Suren A. Chilingaryan <csa@dside.dyndns.org> | 2011-03-09 16:55:27 +0100 |
commit | a008b10d8488ef905a43de00ee5c8efd03b03ed6 (patch) | |
tree | 1d4330f9cbb72f641b197a445863a9012581e405 /default.h | |
parent | b0596cb0f01f885153abffaecfa248920cb8658b (diff) | |
download | pcitool-a008b10d8488ef905a43de00ee5c8efd03b03ed6.tar.gz pcitool-a008b10d8488ef905a43de00ee5c8efd03b03ed6.tar.bz2 pcitool-a008b10d8488ef905a43de00ee5c8efd03b03ed6.tar.xz pcitool-a008b10d8488ef905a43de00ee5c8efd03b03ed6.zip |
Support for FPGA registers
Diffstat (limited to 'default.h')
-rw-r--r-- | default.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/default.h b/default.h new file mode 100644 index 0000000..6345ae8 --- /dev/null +++ b/default.h @@ -0,0 +1,9 @@ +#ifndef _PCILIB_DEFAULT_H +#define _PCILIB_DEFAULT_H + +#include "pci.h" + +int pcilib_default_read(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, uint8_t bits, pcilib_register_value_t *value); +int pcilib_default_write(pcilib_t *ctx, pcilib_register_bank_description_t *bank, pcilib_register_addr_t addr, uint8_t bits, pcilib_register_value_t value); + +#endif /* _PCILIB_DEFAULT_H */ |