bzr branch
http://suren.me/webbzr/alps/pcitool
7.1.6
by Suren A. Chilingaryan
Provide single header for library |
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#ifndef _PCITOOL_PCI_H
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#define _PCITOOL_PCI_H
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by root
North West Logick DMA implementation |
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#define PCILIB_DMA_TIMEOUT 10000 /**< us */ |
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by Suren A. Chilingaryan
Support modifications of DMA engine and allow DMA customizations by Event engine |
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#define PCILIB_DMA_SKIP_TIMEOUT 1000000 /**< us */ |
7.1.6
by Suren A. Chilingaryan
Provide single header for library |
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#define PCILIB_REGISTER_TIMEOUT 10000 /**< us */ |
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#include "driver/pciDriver.h" |
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by root
North West Logick DMA implementation |
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#include "pcilib_types.h" |
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A bit of DMA infrastructure |
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7.1.6
by Suren A. Chilingaryan
Provide single header for library |
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#include "pcilib.h" |
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by Suren A. Chilingaryan
Support FIFO reading/writting, code restructurization, few fixes |
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#include "register.h" |
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by root
North West Logick DMA implementation |
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#include "kmem.h" |
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by Suren A. Chilingaryan
IRQ support in NWL DMA engine |
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#include "irq.h" |
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by Suren A. Chilingaryan
Support FIFO reading/writting, code restructurization, few fixes |
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#include "dma.h" |
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#include "event.h" |
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by root
North West Logick DMA implementation |
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struct pcilib_s { |
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int handle; |
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uintptr_t page_mask; |
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pcilib_board_info_t board_info; |
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pcilib_dma_info_t dma_info; |
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pcilib_model_t model; |
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char *bar_space[PCILIB_MAX_BANKS]; |
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int reg_bar_mapped; |
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pcilib_bar_t reg_bar; |
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// char *reg_space;
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int data_bar_mapped; |
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pcilib_bar_t data_bar; |
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// char *data_space;
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// size_t data_size;
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pcilib_kmem_list_t *kmem_list; |
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by Suren A. Chilingaryan
Support dynamic registers, support register offsets and multiregisters (bitmasks), list NWL DMA registers |
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size_t num_reg, alloc_reg; |
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pcilib_model_description_t model_info; |
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by root
North West Logick DMA implementation |
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pcilib_dma_context_t *dma_ctx; |
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pcilib_context_t *event_ctx; |
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#ifdef PCILIB_FILE_IO
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int file_io_handle; |
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#endif /* PCILIB_FILE_IO */ |
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};
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7.1.6
by Suren A. Chilingaryan
Provide single header for library |
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#ifdef _PCILIB_PCI_C
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by Suren A. Chilingaryan
Infrastructure for event API |
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# include "ipecamera/model.h"
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by root
Enumerate DMA engines |
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# include "dma/nwl.h"
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7.1.6
by Suren A. Chilingaryan
Provide single header for library |
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# include "default.h"
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pcilib_model_description_t pcilib_model[3] = { |
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by Suren A. Chilingaryan
new event architecture, first trial |
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{ 4, PCILIB_HOST_ENDIAN, NULL, NULL, NULL, NULL, NULL, NULL }, |
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{ 4, PCILIB_HOST_ENDIAN, NULL, NULL, NULL, NULL, NULL, NULL }, |
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{ 4, PCILIB_LITTLE_ENDIAN, ipecamera_registers, ipecamera_register_banks, ipecamera_register_ranges, ipecamera_events, ipecamera_data_types, &nwl_dma_api, &ipecamera_image_api } |
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7.1.6
by Suren A. Chilingaryan
Provide single header for library |
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};
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pcilib_protocol_description_t pcilib_protocol[3] = { |
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{ pcilib_default_read, pcilib_default_write }, |
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{ ipecamera_read, ipecamera_write }, |
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{ NULL, NULL } |
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};
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#else
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by Suren A. Chilingaryan
Support dynamic registers, support register offsets and multiregisters (bitmasks), list NWL DMA registers |
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extern pcilib_model_description_t pcilib_model[]; |
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7.1.6
by Suren A. Chilingaryan
Provide single header for library |
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extern void (*pcilib_error)(const char *msg, ...); |
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extern void (*pcilib_warning)(const char *msg, ...); |
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extern pcilib_protocol_description_t pcilib_protocol[]; |
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#endif /* _PCILIB_PCI_C */ |
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by root
North West Logick DMA implementation |
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const pcilib_board_info_t *pcilib_get_board_info(pcilib_t *ctx); |
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const pcilib_dma_info_t *pcilib_get_dma_info(pcilib_t *ctx); |
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int pcilib_map_register_space(pcilib_t *ctx); |
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int pcilib_map_data_space(pcilib_t *ctx, uintptr_t addr); |
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7.1.6
by Suren A. Chilingaryan
Provide single header for library |
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#endif /* _PCITOOL_PCI_H */ |