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* Big redign of model structuresSuren A. Chilingaryan2015-04-201-9/+39
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* Xilinx benchmarkSuren A. Chilingaryan2012-11-141-1/+3
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* Kernel memory allocationSuren A. Chilingaryan2012-11-121-0/+2
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* Synchronize kernel buffers during the read-kernel-memory and while accessing ↵Suren A. Chilingaryan2011-12-141-1/+1
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* Sync only required buffersSuren A. Chilingaryan2011-10-231-1/+2
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* Support exporting data from kernel buffersroot2011-10-211-1/+2
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* Support forceful clean-up of kernel memorySuren A. Chilingaryan2011-07-171-1/+3
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* Implement DMA access synchronization for NWL implementationSuren A. Chilingaryan2011-07-171-3/+6
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* Implement DMA access synchronization in the driverSuren A. Chilingaryan2011-07-161-7/+14
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* First iteration of work to preserve DMA state between executionsSuren A. Chilingaryan2011-07-141-2/+14
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* Support alignments in kmem allocationSuren A. Chilingaryan2011-07-061-0/+3
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* North West Logick DMA implementationroot2011-07-041-0/+47