diff options
Diffstat (limited to 'pcitool/camera.xml')
| -rw-r--r-- | pcitool/camera.xml | 923 |
1 files changed, 923 insertions, 0 deletions
diff --git a/pcitool/camera.xml b/pcitool/camera.xml new file mode 100644 index 0000000..753c707 --- /dev/null +++ b/pcitool/camera.xml @@ -0,0 +1,923 @@ +<?xml version="1.0" encoding="ISO-8859-1"?> +<model xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <banks> + <bank> + <bank_description> + <adress>bank 0</adress> + <bar>0</bar> + <size>128</size> + <protocol>default</protocol> + <read_adress>0x9010</read_adress> + <write_adress>0x9000</write_adress> + <word_size>8</word_size> + <endianess>little</endianess> + <format>%lu</format> + <name>cmosis</name> + <description>CMOSIS CMV2000 Registers</description> + </bank_description> + <registers> + <register> + <adress>1</adress> + <offset>0</offset> + <size>16</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines</name> + <description>test</description> + </register> + <register> + <adress>3</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start1</name> + </register> + <register> + <adress>5</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start2</name> + </register> + <register> + <adress>7</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start3</name> + </register> + <register> + <adress>9</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start4</name> + </register> + <register> + <adress>11</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start5</name> + </register> + <register> + <adress>13</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start6</name> + </register> + <register> + <adress>15</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start7</name> + </register> + <register> + <adress>17</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start8</name> + </register> + <register> + <adress>19</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines1</name> + </register> + <register> + <adress>21</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines2</name> + </register> + <register> + <adress>23</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines3</name> + </register> + <register> + <adress>25</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines4</name> + </register> + <register> + <adress>27</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines5</name> + </register> + <register> + <adress>29</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines6</name> + </register> + <register> + <adress>31</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines7</name> + </register> + <register> + <adress>33</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines8</name> + </register> + <register> + <adress>35</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_sub_s</name> + </register> + <register> + <adress>37</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_sub_a</name> + </register> + <register> + <adress>39</adress> + <offset>0</offset> + <size>1</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_color</name> + </register> + <register> + <adress>40</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_image_flipping</name> + </register> + <register> + <adress>41</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_flags</name> + </register> + <register> + <adress>42</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_time</name> + <views> + <view>formuu3</view> + <view>enumm3</view> + </views> + </register> + <register> + <adress>45</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_step</name> + </register> + <register> + <adress>48</adress> + <offset>0</offset> + <size>24</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_kp1</name> + </register> + <register> + <adress>51</adress> + <offset>0</offset> + <size>24</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_kp2</name> + </register> + <register> + <adress>54</adress> + <offset>0</offset> + <size>2</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_nr_slopes</name> + </register> + <register> + <adress>55</adress> + <offset>0</offset> + <size>8</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_seq</name> + </register> + <register> + <adress>56</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_time2</name> + </register> + <register> + <adress>59</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_step2</name> + </register> + <register> + <adress>68</adress> + <offset>0</offset> + <size>2</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_nr_slopes2</name> + </register> + <register> + <adress>69</adress> + <offset>0</offset> + <size>8</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_seq2</name> + </register> + <register> + <adress>70</adress> + <offset>0</offset> + <size>16</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_frames</name> + </register> + <register> + <adress>72</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_output_mode</name> + </register> + <register> + <adress>78</adress> + <offset>0</offset> + <size>12</size> + <default>85</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_training_pattern</name> + </register> + <register> + <adress>80</adress> + <offset>0</offset> + <size>18</size> + <default>0x3FFFF</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_channel_en</name> + </register> + <register> + <adress>82</adress> + <offset>0</offset> + <size>3</size> + <default>7</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_special_82</name> + </register> + <register> + <adress>89</adress> + <offset>0</offset> + <size>8</size> + <default>96</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_vlow2</name> + </register> + <register> + <adress>90</adress> + <offset>0</offset> + <size>8</size> + <default>96</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_vlow3</name> + </register> + <register> + <adress>100</adress> + <offset>0</offset> + <size>14</size> + <default>16260</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_offset</name> + </register> + <register> + <adress>102</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_pga</name> + </register> + <register> + <adress>103</adress> + <offset>0</offset> + <size>8</size> + <default>32</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_adc_gain</name> + </register> + <register> + <adress>111</adress> + <offset>0</offset> + <size>1</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_bit_mode</name> + </register> + <register> + <adress>112</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_adc_resolution</name> + </register> + <register> + <adress>115</adress> + <offset>0</offset> + <size>1</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_special_115</name> + </register> + </registers> + </bank> + <bank> + <bank_description> + <adress>bank 1</adress> + <bar>0</bar> + <size>0x0200</size> + <protocol>default</protocol> + <read_adress>0x9000</read_adress> + <write_adress>0x9000</write_adress> + <word_size>32</word_size> + <endianess>little</endianess> + <format>0x%lx</format> + <name>fpga</name> + <description>IPECamera Registers</description> + </bank_description> + <registers> + <register> + <adress>0x00</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>spi_conf_input</name> + </register> + <register> + <adress>0x10</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>spi_conf_output</name> + </register> + <register> + <adress>0x20</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>spi_clk_speed</name> + </register> + <register> + <adress>0x30</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>firmware_info</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>8</size> + <mode>R</mode> + <name>firmware_version</name> + </register_bits> + <register_bits> + <offset>8</offset> + <size>1</size> + <mode>R</mode> + <name>firmware_bitmode</name> + </register_bits> + <register_bits> + <offset>12</offset> + <size>2</size> + <mode>R</mode> + <name>adc_resolution</name> + </register_bits> + <register_bits> + <offset>16</offset> + <size>2</size> + <mode>R</mode> + <name>output_mode</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x40</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>control</name> + <registers_bits> + <register_bits> + <offset>31</offset> + <size>1</size> + <mode>R</mode> + <name>freq</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x50</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>status</name> + </register> + <register> + <adress>0x54</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>status2</name> + </register> + <register> + <adress>0x58</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>status3</name> + </register> + <register> + <adress>0x5c</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>fr_status</name> + </register> + <register> + <adress>0x70</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>start_address</name> + </register> + <register> + <adress>0x74</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>end_address</name> + </register> + <register> + <adress>0x78</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>rd_address</name> + </register> + <register> + <adress>0xa0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>fr_param1</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>10</size> + <mode>RW</mode> + <name>fr_skip_lines</name> + </register_bits> + <register_bits> + <offset>10</offset> + <size>11</size> + <mode>RW</mode> + <name>fr_num_lines</name> + </register_bits> + <register_bits> + <offset>21</offset> + <size>11</size> + <mode>RW</mode> + <name>fr_start_address</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0xb0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_param2</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>11</size> + <mode>RW</mode> + <name>fr_threshold_start_line</name> + </register_bits> + <register_bits> + <offset>16</offset> + <size>10</size> + <mode>RW</mode> + <name>fr_area_lines</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0xc0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>skiped_lines</name> + </register> + <register> + <adress>0xd0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_thresholds</name> + </register> + <register> + <adress>0xd0</adress> + <offset>0</offset> + <size>10</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_pixel_thr</name> + </register> + <register> + <adress>0xd0</adress> + <offset>10</offset> + <size>11</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_num_pixel_thr</name> + </register> + <register> + <adress>0xd0</adress> + <offset>21</offset> + <size>11</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_num_lines_thr</name> + </register> + <register> + <adress>0x100</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>rawdata_pkt_addr</name> + </register> + <register> + <adress>0x110</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>temperature_info</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>16</size> + <mode>R</mode> + <name>sensor_temperature</name> + <views> + <view>formuu1</view> + <view>formuu2</view> + <view>enumm2</view> + </views> + </register_bits> + <register_bits> + <offset>16</offset> + <size>3</size> + <mode>R</mode> + <name>sensor_temperature_alarms</name> + </register_bits> + <register_bits> + <offset>19</offset> + <size>10</size> + <mode>RW</mode> + <name>fpga_temperature</name> + <views> + <view>formuu1</view> + <view>enumm1</view> + </views> + </register_bits> + <register_bits> + <offset>29</offset> + <size>3</size> + <mode>R</mode> + <name>fpga_temperature_alarms</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x120</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>num_lines</name> + </register> + <register> + <adress>0x130</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>start_line</name> + </register> + <register> + <adress>0x140</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>exp_time</name> + </register> + <register> + <adress>0x150</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>motor</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_phi</name> + </register_bits> + <register_bits> + <offset>5</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_z</name> + </register_bits> + <register_bits> + <offset>10</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_y</name> + </register_bits> + <register_bits> + <offset>15</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_x</name> + </register_bits> + <register_bits> + <offset>20</offset> + <size>8</size> + <mode>R</mode> + <name>adc_gain</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x160</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>write_status</name> + </register> + <register> + <adress>0x170</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>num_triggers</name> + </register> + <register> + <adress>0x180</adress> + <offset>0</offset> + <size>32</size> + <default>0x280</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>trigger_period</name> + <views> + <view>enumm2</view> + </views> + </register> + <register> + <adress>0x190</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>temperature_sample_period</name> + </register> + <register> + <adress>0x1a0</adress> + <offset>0</offset> + <size>32</size> + <default>0x64</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>ddr_max_frames</name> + </register> + <register> + <adress>0x1b0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>ddr_num_frames</name> + </register> + </registers> + </bank> + <bank> + <bank_description> + <adress>DMA bank</adress> + <bar>0</bar> + <size>0x0200</size> + <protocol>default</protocol> + <read_adress>0x0</read_adress> + <write_adress>0x0</write_adress> + <word_size>32</word_size> + <endianess>little</endianess> + <format>0x%lx</format> + <name>dma</name> + <description>DMA Registers</description> + </bank_description> + </bank> + </banks> + <views> + <view type="formula"> + <name>formuu1</name> + <unit>C</unit> + <read_from_register>(503975./1024000)*@reg - 27315./100</read_from_register> + <write_to_register>(@value + 27315./100)*(102400./503975)</write_to_register> +<description>formula to get real fpga temperature from the fpga_temperature register in decimal</description> + </view> + <view type="enum"> + <name>enumm1</name> + <enum value="0x100" min="0x2" max="0x300">high</enum> + <enum value="0x010">low</enum> + <description>enum towards temperatures register</description> + </view> + <view type="formula"> + <name>formuu2</name> + <unit>C</unit> + <read_from_register>((1./4)*(@reg - 1200)) if @freq==0 else ((3./10)*(@reg - 1000))</read_from_register> + <write_to_register>4*@value + 1200 if @freq==0 else (10./3)*@value + 1000</write_to_register> + <description>formula to get real sensor temperature from the sensor_temperature register in decimal</description> + </view> + <view type="enum"> + <name>enumm2</name> + <enum value="0x120">high</enum> + <enum value="0x010" min="0x00" max="0x020">low</enum> + <description>enum towards sensor_temperature register</description> + </view> + <view type="formula"> + <name>formuu3</name> + <unit>us</unit> + <read_from_register>(@reg+(43./100))*129./(40*1000000)if @freq==0 else (@reg+(43./100))*129./(48*1000000)</read_from_register> + <write_to_register>@value/129.*(40*1000000) - 43./100 if @freq==0 else @value/129.*(48*1000000) - 43./100</write_to_register> + <description>formula to get real exposure time from the cmosis_exp_time register in decimal</description> + </view> + <view type="enum"> + <name>enumm3</name> + <enum value="0x000">short</enum> + <enum value="0x010">mid</enum> + <enum value="0x100" min="0x0F0">long</enum> + <description>enum towards cmosis_exp_register register</description> + </view> + </views> +</model> |