diff options
| -rw-r--r-- | CMakeLists.txt | 4 | ||||
| -rw-r--r-- | README.txt | 23 | ||||
| -rw-r--r-- | models/ipecamera/camera.xml | 923 | ||||
| -rwxr-xr-x | models/ipecamera/registers_and_banks.xsd | 242 | ||||
| -rw-r--r-- | pcilib/CMakeLists.txt | 11 | ||||
| -rw-r--r-- | pcilib/bank.h | 1 | ||||
| -rw-r--r-- | pcilib/bar.c | 1 | ||||
| -rw-r--r-- | pcilib/pci.c | 15 | ||||
| -rw-r--r-- | pcilib/pci.h | 3 | ||||
| -rw-r--r-- | pcilib/register.c | 12 | ||||
| -rw-r--r-- | pcilib/register.h | 1 | ||||
| -rw-r--r-- | pcilib/xml.c | 572 | ||||
| -rw-r--r-- | pcilib/xml.h | 27 | ||||
| -rw-r--r-- | pcitool/camera.xml | 923 | ||||
| -rw-r--r-- | pcitool/cli.c | 7 | ||||
| -rw-r--r-- | pcitool/config.txt | 13 | ||||
| -rwxr-xr-x | pcitool/registers_and_banks.xsd | 242 | ||||
| -rw-r--r-- | protocols/default.c | 11 |
18 files changed, 3018 insertions, 13 deletions
diff --git a/CMakeLists.txt b/CMakeLists.txt index 6e62519..8ad9c98 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -33,6 +33,7 @@ SET(ENV{PKG_CONFIG_PATH} "${LIB_INSTALL_DIR}/pkgconfig:$ENV{PKG_CONFIG_PATH}") find_package(PkgConfig REQUIRED) find_package(Threads REQUIRED) +find_package(PythonLibs REQUIRED) set(EXTRA_SYSTEM_LIBS -lrt) @@ -41,9 +42,10 @@ if (NOT DISABLE_PCITOOL) pkg_check_modules(FASTWRITER fastwriter REQUIRED) endif (NOT DISABLE_PCITOOL) +pkg_check_modules(XMLLIB libxml-2.0 REQUIRED) check_include_files(stdatomic.h HAVE_STDATOMIC_H) -add_definitions("-fPIC --std=c99 -Wall -O2 -gdwarf-2 -g3 -fno-omit-frame-pointer") +add_definitions("-fPIC --std=c99 -Wall -O2 -gdwarf-2 -g3 -fno-omit-frame-pointer -g") #add_definitions("-fPIC --std=c99 -Wall -O2") include(cmake/version.cmake) diff --git a/README.txt b/README.txt new file mode 100644 index 0000000..24c0608 --- /dev/null +++ b/README.txt @@ -0,0 +1,23 @@ +/** installation **/ + +1. download the repository from UFO source tree. +2. from base repository : "cmake -g ." +3. put in the pcitool/config.txt file the pwd to the xml file you want +4. you may just replace the camera.xml file with the one you want with the +same name + +/**utilization**/ +--> BEWARE : for now, this is still an unstable version, "pci -l[l]" will work +for sure, but "pci -r" and "pci -w" work only depending on the protocol used +for registers + +the utilization is the same as usual, the user just have to modify the xml +file for changing the configuration. Here only xml is supported, views aren't +still put in it. + +the only new command on this part is "pci -v" that will validate the xml file +regarding the xsd file in the config.txt file + +/** complementary documentation**/ +the user may find a more complete documentation (still in writing) in ziio/ +documentation repository on the ufo source tree. diff --git a/models/ipecamera/camera.xml b/models/ipecamera/camera.xml new file mode 100644 index 0000000..0188267 --- /dev/null +++ b/models/ipecamera/camera.xml @@ -0,0 +1,923 @@ +<?xml version="1.0" encoding="ISO-8859-1"?> +<model xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <banks> + <bank> + <bank_description> + <adress>bank 0</adress> + <bar>0</bar> + <size>128</size> + <protocol>default</protocol> + <read_adress>0x9010</read_adress> + <write_adress>0x9000</write_adress> + <word_size>8</word_size> + <endianess>little</endianess> + <format>%lu</format> + <name>cmosis</name> + <description>CMOSIS CMV2000 Registers</description> + </bank_description> + <registers> + <register> + <adress>1</adress> + <offset>0</offset> + <size>16</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines</name> + <description>test</description> + </register> + <register> + <adress>3</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start1</name> + </register> + <register> + <adress>5</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start2</name> + </register> + <register> + <adress>7</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start3</name> + </register> + <register> + <adress>9</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start4</name> + </register> + <register> + <adress>11</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start5</name> + </register> + <register> + <adress>13</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start6</name> + </register> + <register> + <adress>15</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start7</name> + </register> + <register> + <adress>17</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start8</name> + </register> + <register> + <adress>19</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines1</name> + </register> + <register> + <adress>21</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines2</name> + </register> + <register> + <adress>23</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines3</name> + </register> + <register> + <adress>25</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines4</name> + </register> + <register> + <adress>27</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines5</name> + </register> + <register> + <adress>29</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines6</name> + </register> + <register> + <adress>31</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines7</name> + </register> + <register> + <adress>33</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines8</name> + </register> + <register> + <adress>35</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_sub_s</name> + </register> + <register> + <adress>37</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_sub_a</name> + </register> + <register> + <adress>39</adress> + <offset>0</offset> + <size>1</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_color</name> + </register> + <register> + <adress>40</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_image_flipping</name> + </register> + <register> + <adress>41</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_flags</name> + </register> + <register> + <adress>42</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_time</name> + <views> + <view>formuu3</view> + <view>enumm3</view> + </views> + </register> + <register> + <adress>45</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_step</name> + </register> + <register> + <adress>48</adress> + <offset>0</offset> + <size>24</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_kp1</name> + </register> + <register> + <adress>51</adress> + <offset>0</offset> + <size>24</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_kp2</name> + </register> + <register> + <adress>54</adress> + <offset>0</offset> + <size>2</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_nr_slopes</name> + </register> + <register> + <adress>55</adress> + <offset>0</offset> + <size>8</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_seq</name> + </register> + <register> + <adress>56</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_time2</name> + </register> + <register> + <adress>59</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_step2</name> + </register> + <register> + <adress>68</adress> + <offset>0</offset> + <size>2</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_nr_slopes2</name> + </register> + <register> + <adress>69</adress> + <offset>0</offset> + <size>8</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_seq2</name> + </register> + <register> + <adress>70</adress> + <offset>0</offset> + <size>16</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_frames</name> + </register> + <register> + <adress>72</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_output_mode</name> + </register> + <register> + <adress>78</adress> + <offset>0</offset> + <size>12</size> + <default>85</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_training_pattern</name> + </register> + <register> + <adress>80</adress> + <offset>0</offset> + <size>18</size> + <default>0x3FFFF</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_channel_en</name> + </register> + <register> + <adress>82</adress> + <offset>0</offset> + <size>3</size> + <default>7</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_special_82</name> + </register> + <register> + <adress>89</adress> + <offset>0</offset> + <size>8</size> + <default>96</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_vlow2</name> + </register> + <register> + <adress>90</adress> + <offset>0</offset> + <size>8</size> + <default>96</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_vlow3</name> + </register> + <register> + <adress>100</adress> + <offset>0</offset> + <size>14</size> + <default>16260</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_offset</name> + </register> + <register> + <adress>102</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_pga</name> + </register> + <register> + <adress>103</adress> + <offset>0</offset> + <size>8</size> + <default>32</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_adc_gain</name> + </register> + <register> + <adress>111</adress> + <offset>0</offset> + <size>1</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_bit_mode</name> + </register> + <register> + <adress>112</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_adc_resolution</name> + </register> + <register> + <adress>115</adress> + <offset>0</offset> + <size>1</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_special_115</name> + </register> + </registers> + </bank> + <bank> + <bank_description> + <adress>bank 1</adress> + <bar>0</bar> + <size>0x0200</size> + <protocol>default</protocol> + <read_adress>0x9000</read_adress> + <write_adress>0x9000</write_adress> + <word_size>32</word_size> + <endianess>little</endianess> + <format>0x%lx</format> + <name>fpga</name> + <description>IPECamera Registers</description> + </bank_description> + <registers> + <register> + <adress>0x00</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>spi_conf_input</name> + </register> + <register> + <adress>0x10</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>spi_conf_output</name> + </register> + <register> + <adress>0x20</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>spi_clk_speed</name> + </register> + <register> + <adress>0x30</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>firmware_info</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>8</size> + <mode>R</mode> + <name>firmware_version</name> + </register_bits> + <register_bits> + <offset>8</offset> + <size>1</size> + <mode>R</mode> + <name>firmware_bitmode</name> + </register_bits> + <register_bits> + <offset>12</offset> + <size>2</size> + <mode>R</mode> + <name>adc_resolution</name> + </register_bits> + <register_bits> + <offset>16</offset> + <size>2</size> + <mode>R</mode> + <name>output_mode</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x40</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>control</name> + <registers_bits> + <register_bits> + <offset>31</offset> + <size>1</size> + <mode>R</mode> + <name>freq</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x50</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>status</name> + </register> + <register> + <adress>0x54</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>status2</name> + </register> + <register> + <adress>0x58</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>status3</name> + </register> + <register> + <adress>0x5c</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>fr_status</name> + </register> + <register> + <adress>0x70</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>start_address</name> + </register> + <register> + <adress>0x74</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>end_address</name> + </register> + <register> + <adress>0x78</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>rd_address</name> + </register> + <register> + <adress>0xa0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>fr_param1</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>10</size> + <mode>RW</mode> + <name>fr_skip_lines</name> + </register_bits> + <register_bits> + <offset>10</offset> + <size>11</size> + <mode>RW</mode> + <name>fr_num_lines</name> + </register_bits> + <register_bits> + <offset>21</offset> + <size>11</size> + <mode>RW</mode> + <name>fr_start_address</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0xb0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_param2</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>11</size> + <mode>RW</mode> + <name>fr_threshold_start_line</name> + </register_bits> + <register_bits> + <offset>16</offset> + <size>10</size> + <mode>RW</mode> + <name>fr_area_lines</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0xc0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>skiped_lines</name> + </register> + <register> + <adress>0xd0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_thresholds</name> + </register> + <register> + <adress>0xd0</adress> + <offset>0</offset> + <size>10</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_pixel_thr</name> + </register> + <register> + <adress>0xd0</adress> + <offset>10</offset> + <size>11</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_num_pixel_thr</name> + </register> + <register> + <adress>0xd0</adress> + <offset>21</offset> + <size>11</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_num_lines_thr</name> + </register> + <register> + <adress>0x100</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>rawdata_pkt_addr</name> + </register> + <register> + <adress>0x110</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>temperature_info</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>16</size> + <mode>R</mode> + <name>sensor_temperature</name> + <views> + <view>formuu1</view> + <view>formuu2</view> + <view>enumm2</view> + </views> + </register_bits> + <register_bits> + <offset>16</offset> + <size>3</size> + <mode>R</mode> + <name>sensor_temperature_alarms</name> + </register_bits> + <register_bits> + <offset>19</offset> + <size>10</size> + <mode>RW</mode> + <name>fpga_temperature</name> + <views> + <view>formuu1</view> + <view>enumm1</view> + </views> + </register_bits> + <register_bits> + <offset>29</offset> + <size>3</size> + <mode>R</mode> + <name>fpga_temperature_alarms</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x120</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>num_lines</name> + </register> + <register> + <adress>0x130</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>start_line</name> + </register> + <register> + <adress>0x140</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>exp_time</name> + </register> + <register> + <adress>0x150</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>motor</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_phi</name> + </register_bits> + <register_bits> + <offset>5</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_z</name> + </register_bits> + <register_bits> + <offset>10</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_y</name> + </register_bits> + <register_bits> + <offset>15</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_x</name> + </register_bits> + <register_bits> + <offset>20</offset> + <size>8</size> + <mode>R</mode> + <name>adc_gain</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x160</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>write_status</name> + </register> + <register> + <adress>0x170</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>num_triggers</name> + </register> + <register> + <adress>0x180</adress> + <offset>0</offset> + <size>32</size> + <default>0x280</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>trigger_period</name> + <views> + <view>enumm2</view> + </views> + </register> + <register> + <adress>0x190</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>temperature_sample_period</name> + </register> + <register> + <adress>0x1a0</adress> + <offset>0</offset> + <size>32</size> + <default>0x64</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>ddr_max_frames</name> + </register> + <register> + <adress>0x1b0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>ddr_num_frames</name> + </register> + </registers> + </bank> + <bank> + <bank_description> + <adress>DMA bank</adress> + <bar>0</bar> + <size>0x0200</size> + <protocol>default</protocol> + <read_adress>0x0</read_adress> + <write_adress>0x0</write_adress> + <word_size>32</word_size> + <endianess>little</endianess> + <format>0x%lx</format> + <name>dma</name> + <description>DMA Registers</description> + </bank_description> + </bank> + </banks> + <views> + <view type="formula"> + <name>formuu1</name> + <unit>C</unit> + <read_from_register>(503975./1024000)*@reg - 27315./100</read_from_register> + <write_to_register>(@value + 27315./100)*(102400./503975)</write_to_register> +<description>formula to get real fpga temperature from the fpga_temperature register in decimal</description> + </view> + <view type="enum"> + <name>enumm1</name> + <enum value="0x100" min="0x2" max="0x300">high</enum> + <enum value="0x010">low</enum> + <description>enum towards temperatures register</description> + </view> + <view type="formula"> + <name>formuu2</name> + <unit>C</unit> + <read_from_register>((1./4)*(@reg - 1200)) if @freq==0 else ((3./10)*(@reg - 1000))</read_from_register> + <write_to_register>4*@value + 1200 if @freq==0 else (10./3)*@value + 1000</write_to_register> + <description>formula to get real sensor temperature from the sensor_temperature register in decimal</description> + </view> + <view type="enum"> + <name>enumm2</name> + <enum value="0x120">high</enum> + <enum value="0x010" min="0x00" max="0x020">low</enum> + <description>enum towards sensor_temperature register</description> + </view> + <view type="formula"> + <name>formuu3</name> + <unit>us</unit> + <read_from_register>(@reg+(43./100))*129./(40*1000000)if @freq==0 else (@reg+(43./100))*129./(48*1000000)</read_from_register> + <write_to_register>@value/129.*(40*1000000) - 43./100 if @freq==0 else @value/129.*(48*1000000) - 43./100</write_to_register> + <description>formula to get real exposure time from the cmosis_exp_time register in decimal</description> + </view> + <view type="enum"> + <name>enumm3</name> + <enum value="0x000">short</enum> + <enum value="0x010">mid</enum> + <enum value="0x100" min="0x0F0">long</enum> + <description>enum towards cmosis_exp_register register</description> + </view> + </views> +</model> diff --git a/models/ipecamera/registers_and_banks.xsd b/models/ipecamera/registers_and_banks.xsd new file mode 100755 index 0000000..10d49b7 --- /dev/null +++ b/models/ipecamera/registers_and_banks.xsd @@ -0,0 +1,242 @@ +<?xml version="1.0" encoding="ISO-8859-1"?> +<xsd:schema xmlns:xsd="http://www.w3.org/2001/XMLSchema"> + + <xsd:element name="model"> + <xsd:complexType> + <xsd:sequence> + <xsd:element name="banks" type="banks_type"/> + <xsd:element name="views" type="views_type" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + </xsd:complexType> + <xsd:key name="Registerkey"> + <xsd:selector xpath="views/view/name"/> + <xsd:field xpath="."/> + </xsd:key> + <xsd:keyref refer="Registerkey" name="RegisterkeyRef"> + <xsd:selector xpath="banks/bank/registers/register/views/view"/> + <xsd:field xpath="."/> + </xsd:keyref> + <xsd:key name="Registerbitskey"> + <xsd:selector xpath="views/view/name"/> + <xsd:field xpath="."/> + </xsd:key> + <xsd:keyref refer="Registerbitskey" name="RegisterbitskeyRef"> + <xsd:selector xpath="banks/bank/registers/register/registers_bits/register_bits/views/view"/> + <xsd:field xpath="."/> + </xsd:keyref> + </xsd:element> + + + <xsd:complexType name="views_type"> + <xsd:sequence> + <xsd:element name="view" type="view_type" maxOccurs="unbounded"/> + </xsd:sequence> + </xsd:complexType> + + + <xsd:complexType name="banks_type"> + <xsd:sequence> + <xsd:element name="bank" type="banktype" minOccurs="1" maxOccurs="12"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="banktype"> + <xsd:sequence> + <xsd:element name="bank_description" type="bank_description_t"/> + <xsd:element name="registers" type="registerstype" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="bank_description_t"> + <xsd:sequence> + <xsd:element name="adress" type="bank_adress_type"/> + <xsd:element name="bar" type="bar_type"/> + <xsd:element name="size" type="hexa_and_integer64_t"/> + <xsd:element name="protocol" type="xsd:string"/> + <xsd:element name="read_adress" type="hex64_t"/> + <xsd:element name="write_adress" type="hex64_t"/> + <xsd:element name="word_size" type="uint8_t"/> + <xsd:element name="endianess" type="endianess_type"/> + <xsd:element name="format" type="xsd:string"/> + <xsd:element name="name" type="xsd:string"/> + <xsd:element name="description" type="xsd:string" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + </xsd:complexType> + + + <xsd:complexType name="registerstype"> + <xsd:sequence> + <xsd:element name="register" type="register_type" minOccurs="0" maxOccurs="256"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="register_type"> + <xsd:sequence> + <xsd:element name="adress" type="hexa_and_integer32_t"/> + <xsd:element name="offset" type="uint8_t"/> + <xsd:element name="size" type="uint8_t"/> + <xsd:element name="default" type="hexa_and_integer32_t"/> + <xsd:element name="rwmask" type="rwmask_type"/> + <xsd:element name="mode" type="pcilib_register_mode_t"/> + <xsd:element name="name" type="xsd:string"/> + <xsd:element name="description" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="views" type="reg_to_views_type" minOccurs="0" maxOccurs="1"/> + <xsd:element name="registers_bits" type="registers_bits_type" minOccurs="0" maxOccurs="1"/> + <xsd:element name="value_min" type="hexa_and_integer32_t" minOccurs="0" maxOccurs="1"/> + <xsd:element name="value_max" type="hexa_and_integer32_t" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="registers_bits_type"> + <xsd:sequence> + <xsd:element name="register_bits" type="register_bits_type" minOccurs="1" maxOccurs="32"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="reg_to_views_type"> + <xsd:sequence> + <xsd:element name="view" type="xsd:string" minOccurs="1" maxOccurs="unbounded"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="register_bits_type"> + <xsd:sequence> + <xsd:element name="offset" type="uint8_t"/> + <xsd:element name="size" type="uint8_t"/> + <xsd:element name="mode" type="pcilib_register_mode_t"/> + <xsd:element name="name" type="xsd:string"/> + <xsd:element name="description" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="views" type="reg_to_views_type" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + + </xsd:complexType> + + <xsd:simpleType name="uint8_t"> + <xsd:restriction base="xsd:integer"> + <xsd:minInclusive value="0"/> + <xsd:maxInclusive value="255"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="size_t"> + <xsd:restriction base="xsd:integer"> + <xsd:minInclusive value="0"/> + <xsd:maxInclusive value="18446744073709551615"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="uintptr_t"> + <xsd:restriction base="xsd:integer"> + <xsd:minInclusive value="0"/> + <xsd:maxInclusive value="18446744073709551615"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="uint32_t"> + <xsd:restriction base="xsd:integer"> + <xsd:minInclusive value="0"/> + <xsd:maxInclusive value="4294967295"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="pcilib_register_mode_t"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="R"/> + <xsd:enumeration value="W"/> + <xsd:enumeration value="RW"/> + <xsd:enumeration value="W1C"/> + <xsd:enumeration value="RW1C"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="bank_adress_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="bank 0"/> + <xsd:enumeration value="bank 1"/> + <xsd:enumeration value="bank 2"/> + <xsd:enumeration value="bank 3"/> + <xsd:enumeration value="DMA bank"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="endianess_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="little"/> + <xsd:enumeration value="big"/> + <xsd:enumeration value="host"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="bar_type"> + <xsd:restriction base="xsd:integer"> + <xsd:enumeration value="0"/> + <xsd:enumeration value="1"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="space_adress_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="write adress"/> + <xsd:enumeration value="read adress"/> + <xsd:enumeration value="space adress"/> + <xsd:enumeration value="0"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="rwmask_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="all bits"/> + <xsd:enumeration value="0"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="hexa_and_integer32_t"> + <xsd:union memberTypes="uint32_t hex32_t"/> + </xsd:simpleType> + + <xsd:simpleType name="hex32_t"> + <xsd:restriction base="xsd:string"> + <xsd:pattern value="0x([a-fA-F0-9]){0,8}"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="hexa_and_integer64_t"> + <xsd:union memberTypes="size_t hex64_t"/> + </xsd:simpleType> + + <xsd:simpleType name="hex64_t"> + <xsd:restriction base="xsd:string"> + <xsd:pattern value="0x([a-fA-F0-9]){0,16}"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:complexType name="view_type"> + <xsd:sequence> + <xsd:element name="name" type="xsd:ID"/> + <xsd:element name="unit" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="read_from_register" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="write_to_register" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="enum" type="enum_t" minOccurs="0" maxOccurs="unbounded"/> + <xsd:element name="description" type="xsd:string"/> + </xsd:sequence> + <xsd:attribute name="type" type="viewtype_type" use="required"/> + </xsd:complexType> + + <xsd:complexType name="enum_t"> + <xsd:simpleContent> + <xsd:extension base="xsd:string"> + <xsd:attribute name="value" type="hexa_and_integer64_t" use="required"/> + <xsd:attribute name="min" type="hexa_and_integer64_t"/> + <xsd:attribute name="max" type="hexa_and_integer64_t"/> + </xsd:extension> + </xsd:simpleContent> + </xsd:complexType> + + <xsd:simpleType name="viewtype_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="enum"/> + <xsd:enumeration value="formula"/> + </xsd:restriction> + </xsd:simpleType> + +</xsd:schema> diff --git a/pcilib/CMakeLists.txt b/pcilib/CMakeLists.txt index e21f1ba..4c36141 100644 --- a/pcilib/CMakeLists.txt +++ b/pcilib/CMakeLists.txt @@ -1,13 +1,18 @@ include_directories( ${CMAKE_SOURCE_DIR} + ${PYTHON_INCLUDE_DIRS} + ${XMLLIB_INCLUDE_DIRS} ${CMAKE_BINARY_DIR} ${CMAKE_SOURCE_DIR}/pcilib ${CMAKE_BINARY_DIR}/pcilib ) -set(HEADERS pcilib.h pci.h export.h bar.h fifo.h model.h bank.h register.h kmem.h irq.h locking.h lock.h dma.h event.h plugin.h tools.h error.h debug.h env.h version.h config.h) -add_library(pcilib SHARED pci.c export.c bar.c fifo.c model.c bank.c register.c kmem.c irq.c locking.c lock.c dma.c event.c plugin.c tools.c error.c debug.c env.c ) -target_link_libraries(pcilib dma protocols ${CMAKE_THREAD_LIBS_INIT} ${UFODECODE_LIBRARIES} ${CMAKE_DL_LIBS} ${EXTRA_SYSTEM_LIBS}) +set(HEADERS pcilib.h pci.h export.h bar.h fifo.h model.h bank.h register.h +kmem.h irq.h locking.h lock.h dma.h event.h plugin.h tools.h error.h debug.h +env.h version.h config.h xml.h) +add_library(pcilib SHARED pci.c export.c bar.c fifo.c model.c bank.c register.c kmem.c irq.c locking.c lock.c dma.c event.c plugin.c tools.c error.c debug.c env.c xml.c) +target_link_libraries(pcilib dma protocols ${CMAKE_THREAD_LIBS_INIT} ${UFODECODE_LIBRARIES} ${CMAKE_DL_LIBS} ${EXTRA_SYSTEM_LIBS} ${XMLLIB_LIBRARIES} ${PYTHON_LIBRARIES}) + add_dependencies(pcilib dma protocols) install(TARGETS pcilib diff --git a/pcilib/bank.h b/pcilib/bank.h index a0ba9fe..8074197 100644 --- a/pcilib/bank.h +++ b/pcilib/bank.h @@ -84,6 +84,7 @@ typedef struct { struct pcilib_register_bank_context_s { const pcilib_register_bank_description_t *bank; /**< Corresponding bank description */ const pcilib_register_protocol_api_description_t *api; /**< API functions */ + /*use it or not?*/ /*xmlNodeSetPtr banks_nodes;*/ }; #ifdef __cplusplus diff --git a/pcilib/bar.c b/pcilib/bar.c index 074a0b2..3dc27c9 100644 --- a/pcilib/bar.c +++ b/pcilib/bar.c @@ -131,6 +131,7 @@ void pcilib_unmap_bar(pcilib_t *ctx, pcilib_bar_t bar, void *data) { } int pcilib_map_register_space(pcilib_t *ctx) { + printf("mapping\n"); int err; pcilib_register_bank_t i; diff --git a/pcilib/pci.c b/pcilib/pci.c index ca17931..3a0073b 100644 --- a/pcilib/pci.c +++ b/pcilib/pci.c @@ -26,6 +26,7 @@ #include "model.h" #include "plugin.h" #include "bar.h" +#include "xml.h" #include "locking.h" static int pcilib_detect_model(pcilib_t *ctx, const char *model) { @@ -108,7 +109,7 @@ pcilib_t *pcilib_open(const char *device, const char *model) { int err; size_t i; pcilib_t *ctx = malloc(sizeof(pcilib_t)); - + if (!model) model = getenv("PCILIB_MODEL"); @@ -171,7 +172,9 @@ pcilib_t *pcilib_open(const char *device, const char *model) { if (!ctx->model) ctx->model = strdup(model?model:"pci"); - + + pcilib_init_xml(ctx); + ctx->model_info.registers = ctx->registers; ctx->model_info.banks = ctx->banks; ctx->model_info.protocols = ctx->protocols; @@ -183,6 +186,7 @@ pcilib_t *pcilib_open(const char *device, const char *model) { pcilib_close(ctx); return NULL; } + err = pcilib_init_event_engine(ctx); if (err) { @@ -278,6 +282,7 @@ int pcilib_map_data_space(pcilib_t *ctx, uintptr_t addr) { char *pcilib_resolve_register_address(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t addr) { if (bar == PCILIB_BAR_DETECT) { + printf("bar = PCILIB_BAR_DETECT\n"); // First checking the default register bar size_t offset = addr - ctx->board_info.bar_start[ctx->reg_bar]; if ((addr > ctx->board_info.bar_start[ctx->reg_bar])&&(offset < ctx->board_info.bar_length[ctx->reg_bar])) { @@ -292,6 +297,7 @@ char *pcilib_resolve_register_address(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t // Otherwise trying to detect bar = pcilib_detect_bar(ctx, addr, 1); if (bar != PCILIB_BAR_INVALID) { + printf("bar pas ainvalid\n"); size_t offset = addr - ctx->board_info.bar_start[bar]; if ((offset < ctx->board_info.bar_length[bar])&&(ctx->bar_space[bar])) { if (!ctx->bar_space[bar]) { @@ -302,16 +308,21 @@ char *pcilib_resolve_register_address(pcilib_t *ctx, pcilib_bar_t bar, uintptr_t } } } else { + printf("bar internal :%i\n",bar); + // printf("bar invalid\n"); if (!ctx->bar_space[bar]) { pcilib_error("The requested bar (%i) is not mapped", bar); return NULL; } if (addr < ctx->board_info.bar_length[bar]) { + printf("path1\n"); + // printf("apres: %s\n",ctx->bar_space[bar] + addr); return ctx->bar_space[bar] + addr + (ctx->board_info.bar_start[bar] & ctx->page_mask); } if ((addr >= ctx->board_info.bar_start[bar])&&(addr < (ctx->board_info.bar_start[bar] + ctx->board_info.bar_length[ctx->reg_bar]))) { + printf("path2\n"); return ctx->bar_space[bar] + (addr - ctx->board_info.bar_start[bar]) + (ctx->board_info.bar_start[bar] & ctx->page_mask); } } diff --git a/pcilib/pci.h b/pcilib/pci.h index 340abd3..e3ed1c5 100644 --- a/pcilib/pci.h +++ b/pcilib/pci.h @@ -25,6 +25,7 @@ #include "model.h" #include "export.h" #include "locking.h" +#include <libxml/tree.h> typedef struct { uint8_t max_link_speed, link_speed; @@ -71,6 +72,8 @@ struct pcilib_s { pcilib_register_bank_context_t *bank_ctx[PCILIB_MAX_REGISTER_BANKS]; /**< Contexts for registers banks if required by register protocol */ pcilib_dma_context_t *dma_ctx; /**< DMA context */ pcilib_context_t *event_ctx; /**< Implmentation context */ + xmlNodePtr* banks_xml_nodes; /**<pointer to xml nodes of banks in the xml file*/ + xmlNodePtr* registers_xml_nodes; /**< pointer to xml nodes of registers in the xml file*/ pcilib_lock_t *dma_rlock[PCILIB_MAX_DMA_ENGINES]; /**< Per-engine locks to serialize streaming and read operations */ pcilib_lock_t *dma_wlock[PCILIB_MAX_DMA_ENGINES]; /**< Per-engine locks to serialize write operations */ diff --git a/pcilib/register.c b/pcilib/register.c index 347bf7c..5909991 100644 --- a/pcilib/register.c +++ b/pcilib/register.c @@ -91,16 +91,22 @@ static int pcilib_read_register_space_internal(pcilib_t *ctx, pcilib_register_ba for (i = 0; i < n; i++) { err = bapi->read(ctx, bctx, addr + i * access, buf + i); + printf("buf +i: %i \n",buf[i]); + if(err) printf("err internal 1: %i\n",err); if (err) break; } if ((bits > 0)&&(!err)) { pcilib_register_value_t val = 0; err = bapi->read(ctx, bctx, addr + n * access, &val); - + val = (val >> offset)&BIT_MASK(bits); + printf("val : %i\n",val); memcpy(buf + n, &val, sizeof(pcilib_register_value_t)); + if(err) printf("err internal 2: %i\n",err); } + printf("err internal 3: %i\n",err); + printf("buf internal: %i\n",buf[0]); return err; } @@ -143,14 +149,18 @@ int pcilib_read_register_by_id(pcilib_t *ctx, pcilib_register_t reg, pcilib_regi pcilib_error("Big-endian byte order support is not implemented"); return PCILIB_ERROR_NOTSUPPORTED; } else { + printf("bits: %i, n %lu\n",bits, n); res = 0; if (bits) ++n; for (i = 0; i < n; i++) { + printf("res: %i buf[i]: %i\n",res,buf[i]); res |= buf[i] << (i * b->access); + printf("res: %i \n",res); } } *value = res; + printf("value : %i\n",*value); return err; } diff --git a/pcilib/register.h b/pcilib/register.h index 535e9d0..61eef84 100644 --- a/pcilib/register.h +++ b/pcilib/register.h @@ -45,6 +45,7 @@ typedef struct { typedef struct { pcilib_register_bank_t bank; + /* use it or not?*/ /*xmlNodeSetPtr registers_nodes;*/ } pcilib_register_context_t; diff --git a/pcilib/xml.c b/pcilib/xml.c new file mode 100644 index 0000000..55cdf11 --- /dev/null +++ b/pcilib/xml.c @@ -0,0 +1,572 @@ +/** + * @file pcilib_xml.c + * @version 1.0 + * + * @brief this file is the main source file for the implementation of dynamic registers using xml and several funtionalities for the "pci-tool" line command tool from XML files. the xml part has been implemented using libxml2 + * + * @details this code was meant to be evolutive as the XML files evolute. In this meaning, most of the xml parsing is realized with XPath expressions(when it was possible), so that changing the xml xould result mainly in changing the XPAth pathes present in the header file. In a case of a change in xml file, variables that need to be changed other than xpathes, will be indicated in the description of the function. + + Libxml2 considers blank spaces within the XML as node natively and this code as been produced considering blank spaces in the XML files. In case XML files would not contain blank spaces anymore, please change the code. + + In case the performance is not good enough, please consider the following : no more configuration file indicating where the files required are, hard code of formulas, and go to complete non evolutive code : get 1 access to xml file and context, and then make recursive descent to get all you need(investigation of libxml2 source code would be so needed to prove it's better to go recursive than just xpath). + */ +#define _XOPEN_SOURCE 700 +#include "xml.h" +#include "error.h" +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <assert.h> +#include "pci.h" +#include "bank.h" +#include "register.h" +#include <libxml/xmlschemastypes.h> +#include <libxml/tree.h> +#include <libxml/parser.h> +#include <libxml/xpath.h> +#include <libxml/xpathInternals.h> + +#include <dirent.h> +#include <errno.h> + +/** pcilib_xml_getdoc + * this function takes a string and will create an abtract syntax tree from the xml file represented by the string + * @param[in] filename the the name of the xml file containing registers and banks + */ +static xmlDocPtr +pcilib_xml_getdoc(char* filename){ + xmlDocPtr doc; + doc=xmlParseFile(filename); /**<the creation of the AST from a libxml2 funtion*/ + + if (doc==NULL){ + pcilib_error("xml document not parsed successfully"); + return NULL; + } + + return doc; +} + +/** pcilib_xml_getsetproperty + * this function takes a context from an AST and an XPath expression, to produce an object containing the nodes corresponding to the xpath expression + * @param[in] doc the AST of the xml file + * @param[in] xpath the xpath expression that will be evaluated + */ +static xmlXPathObjectPtr +pcilib_xml_getsetproperty(xmlXPathContextPtr doc, xmlChar *xpath){ + xmlXPathObjectPtr result; + result=xmlXPathEvalExpression(xpath, doc); /**<the creation of the resulting object*/ + if(result==NULL){ + return NULL; + } + + if(xmlXPathNodeSetIsEmpty(result->nodesetval)){ + xmlXPathFreeObject(result); + return NULL; + } + + return result; +} + +/** pcilib_xml_getcontext. + * this function create a context in an AST (ie initialize XPAth for the AST). + * @param[in] doc the AST of the xml file. + */ +static xmlXPathContextPtr +pcilib_xml_getcontext(xmlDocPtr doc){ + xmlXPathContextPtr context; + context= xmlXPathNewContext(doc); /**<the creation of the context using a libxml2's function */ + if(context==NULL){ + pcilib_error("warning : no context obtained for the xml document"); + return NULL; + } + return context; +} + + +/** validation + * function to validate the xml file against the xsd + * @param[in] xml_filename path to the xml file + * @param[in] xsd_filename path to the xsd file + */ +static int +validation(char* xml_filename, char* xsd_filename) +{ +xmlDocPtr doc; +xmlSchemaPtr schema = NULL; +xmlSchemaParserCtxtPtr ctxt; +int ret=1; + +/** we first parse the xsd file for AST with validation*/ +ctxt = xmlSchemaNewParserCtxt(xsd_filename); +schema = xmlSchemaParse(ctxt); +xmlSchemaFreeParserCtxt(ctxt); + +doc = xmlReadFile(xml_filename, NULL, 0); + +if (doc == NULL) +{ + pcilib_error("Could not parse xml document "); +} +else +{ +xmlSchemaValidCtxtPtr ctxt; +/** validation here*/ +ctxt = xmlSchemaNewValidCtxt(schema); +ret = xmlSchemaValidateDoc(ctxt, doc); +xmlSchemaFreeValidCtxt(ctxt); +xmlFreeDoc(doc); +} + +if(schema != NULL) +xmlSchemaFree(schema); +xmlSchemaCleanupTypes(); + +if(ret!=0) pcilib_warning("\nxml file \"%s\" does not validate against the schema, its register won't be used",xml_filename); + + return ret; +} + + + +/** pcilib_xml_create_bank + * + * this function create a bank structure from a xml bank node + * @param[out] mybank the created bank. + * @param[in] my node the xml node used to create the bank + * @param[in] doc the AST of the xml file, used for used lixbml functions + */ +static void +pcilib_xml_create_bank(pcilib_register_bank_description_t *mybank, xmlNodePtr mynode, xmlDocPtr doc){ + + char* ptr; + xmlNodePtr cur; + xmlChar *value; + + cur=mynode->children; /** we place ourselves in the childrens of the bank node*/ + + /** we iterate through all children, representing bank properties, to fill the structure*/ + while(cur!=NULL){ + /** we get each time the name of the node, corresponding to one property, and the value of the node*/ + value=xmlNodeListGetString(doc,cur->children,1); + + if(strcmp((char*)cur->name,"adress")==0){ + if (strcmp((char*)value,"bank 0")==0){ + mybank->addr=PCILIB_REGISTER_BANK0; + }else if (strcmp((char*)value,"bank 1")==0){ + mybank->addr=PCILIB_REGISTER_BANK1; + }else if (strcmp((char*)value,"bank 2")==0){ + mybank->addr=PCILIB_REGISTER_BANK2; + }else if (strcmp((char*)value,"bank 3")==0){ + mybank->addr=PCILIB_REGISTER_BANK3; + }else if (strcmp((char*)value,"DMA bank")==0){ + mybank->addr=PCILIB_REGISTER_BANK_DMA; + }else if (strcmp((char*)value,"DMAconf bank")==0){ + mybank->addr=PCILIB_REGISTER_BANK_DMACONF; + }else if (strcmp((char*)value,"dynamic bank")==0){ + mybank->addr=PCILIB_REGISTER_BANK_DYNAMIC; + }else{ + mybank->addr=PCILIB_REGISTER_BANK_INVALID; + } + + }else if(strcmp((char*)cur->name,"bar")==0){ + if(strcmp((char*)value,"0")==0){ + mybank->bar=PCILIB_BAR0; + }else if(strcmp((char*)value,"1")==0){ + mybank->bar=PCILIB_BAR1; + }else if(strcmp((char*)value,"no_bar")==0){ + mybank->bar=PCILIB_BAR_NOBAR; + }else{ + mybank->bar=PCILIB_BAR_INVALID; + } + mybank->bar=(pcilib_bar_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"size")==0){ + mybank->size=(size_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"protocol")==0){ + if(strcmp((char*)value,"default")==0){ + mybank->protocol=PCILIB_REGISTER_PROTOCOL_DEFAULT; + }else if(strcmp((char*)value,"0")==0){ + mybank->protocol=PCILIB_REGISTER_PROTOCOL0; + }else if(strcmp((char*)value,"dma")==0){ + mybank->protocol=PCILIB_REGISTER_PROTOCOL_DMA; + }else if(strcmp((char*)value,"dynamic")==0){ + mybank->protocol=PCILIB_REGISTER_PROTOCOL_DYNAMIC; + }else if (strcmp((char*)value,"software")==0){ + mybank->protocol=PCILIB_REGISTER_PROTOCOL_SOFTWARE; + }else mybank->protocol=PCILIB_REGISTER_PROTOCOL_INVALID; + + }else if(strcmp((char*)cur->name,"read_adress")==0){ + mybank->read_addr=(uintptr_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"write_adress")==0){ + mybank->write_addr=(uintptr_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"word_size")==0){ + mybank->access=(uint8_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"endianess")==0){ + if(strcmp((char*)value,"little")==0){ + mybank->endianess=PCILIB_LITTLE_ENDIAN; + }else if(strcmp((char*)value,"big")==0){ + mybank->endianess=PCILIB_BIG_ENDIAN; + }else if(strcmp((char*)value,"host")==0){ + mybank->endianess=PCILIB_HOST_ENDIAN; + } + mybank->raw_endianess=mybank->endianess; + + }else if(strcmp((char*)cur->name,"format")==0){ + mybank->format=(char*)value; + + }else if(strcmp((char*)cur->name,"name")==0){ + mybank->name=(char*)value; + + }else if(strcmp((char*)cur->name,"description")==0){ + mybank->description=(char*)value; + } + + cur=cur->next; + } +} + + + +/** pcilib_xml_initialize_banks + * + * function to create the structures to store the banks from the AST + * @see pcilib_xml_create_bank( + * @param[in] doc the AST of the xml file. + * @param[in] pci the pcilib_t running, which will be filled + */ +static void +pcilib_xml_initialize_banks(pcilib_t* pci,xmlDocPtr doc){ + pcilib_register_bank_description_t mybank; + + xmlNodeSetPtr nodesetadress=NULL; + xmlNodePtr mynode; + pcilib_register_bank_description_t* banks; + xmlXPathContextPtr context; + int i; + + mynode=malloc(sizeof(xmlNode)); + context=pcilib_xml_getcontext(doc); + + /** we get the bank nodes using xpath expression*/ + nodesetadress=pcilib_xml_getsetproperty(context,BANKS_PATH)->nodesetval; + if(nodesetadress->nodeNr>0) banks=calloc((nodesetadress->nodeNr),sizeof(pcilib_register_bank_description_t)); + else return; + + pci->banks_xml_nodes=calloc(nodesetadress->nodeNr,sizeof(xmlNodePtr)); + if(!(pci->banks_xml_nodes)) pcilib_warning("can't create bank xml nodes for pcilib_t struct"); + + /** for each of the bank nodes, we create the associated structure*/ + for(i=0;i<nodesetadress->nodeNr;i++){ + mynode=nodesetadress->nodeTab[i]; + pcilib_xml_create_bank(&mybank,mynode,doc); + banks[i]=mybank; + pci->banks_xml_nodes[i]=mynode; + } + /** we push our banks structures in the pcilib environnement*/ + pcilib_add_register_banks(pci,nodesetadress->nodeNr,banks); +} + +/* + * next 2 functions are for the implementation of a merge sort algorithm, because we need a stable algorithm + */ +static void +pcilib_xml_topdownmerge(pcilib_register_description_t *A, int start, int middle, int end, pcilib_register_description_t *B){ + int i0,i1,j; + i0= start; + i1=middle; + + for(j=start;j<end;j++){ + if((i0 < middle) && (i1>=end || A[i0].addr<=A[i1].addr)){ + B[j]=A[i0]; + i0++; + } + else{ + B[j]=A[i1]; + i1++; + } + } +} + +static void +pcilib_xml_topdownsplitmerge(pcilib_register_description_t *A, int start, int end, pcilib_register_description_t *B){ + int middle; + if(end-start <2) + return; + + middle =(end+start)/2; + pcilib_xml_topdownsplitmerge(A,start, middle,B); + pcilib_xml_topdownsplitmerge(A,middle,end,B); + pcilib_xml_topdownmerge(A,start,middle,end,B); + memcpy(&A[start],&B[start],(end-start)*sizeof(pcilib_register_description_t)); +} + +/** pcilib_xml_arrange_registers + * after the complete structure containing the registers has been created from the xml, this function rearrange them by address in order to add them in pcilib_open, which don't consider the adding of registers in order of adress + * @param[in,out] registers the list of registers in : not ranged out: ranged. + * @param[in] size the number of registers. + */ +void pcilib_xml_arrange_registers(pcilib_register_description_t *registers,int size){ + pcilib_register_description_t* temp; + temp=malloc(size*sizeof(pcilib_register_description_t)); + pcilib_xml_topdownsplitmerge(registers,0,size,temp); + free(temp); +} + +/** pcilib_xml_create_register. + * this function create a register structure from a xml register node. + * @param[out] myregister the register we want to create + * @param[in] type the type of the future register, because this property can't be parsed + * @param[in] doc the AST of the xml file, required for some ibxml2 sub-fonctions + * @param[in] mynode the xml node to create register from + */ +void pcilib_xml_create_register(pcilib_register_description_t *myregister,xmlNodePtr mynode, xmlDocPtr doc, xmlChar* type){ + + char* ptr; + xmlNodePtr cur; + xmlChar *value; + xmlChar *bank; + + /**we get the children of the register xml nodes, that contains the properties for it*/ + cur=mynode->children; + + while(cur!=NULL){ + value=xmlNodeListGetString(doc,cur->children,1); + /* we iterate throug each children to get the associated property + note :the use of strtol permits to get as well hexadecimal and decimal values + */ + if(strcmp((char*)cur->name,"adress")==0){ + myregister->addr=(pcilib_register_addr_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"offset")==0){ + myregister->offset=(pcilib_register_size_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"size")==0){ + myregister->bits=(pcilib_register_size_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"default")==0){ + myregister->defvalue=(pcilib_register_value_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"rwmask")==0){ + if(strcmp((char*)value,"all bits")==0){ + myregister->rwmask=PCILIB_REGISTER_ALL_BITS; + }else if(strcmp((char*)value,"0")==0){ + myregister->rwmask=0; + }else{ + myregister->rwmask=(pcilib_register_value_t)strtol((char*)value,&ptr,0); + } + + }else if(strcmp((char*)cur->name,"mode")==0){ + if(strcmp((char*)value,"R")==0){ + myregister->mode=PCILIB_REGISTER_R; + }else if(strcmp((char*)value,"W")==0){ + myregister->mode=PCILIB_REGISTER_W; + }else if(strcmp((char*)value,"RW")==0){ + myregister->mode=PCILIB_REGISTER_RW; + }else if(strcmp((char*)value,"W")==0){ + myregister->mode=PCILIB_REGISTER_W; + }else if(strcmp((char*)value,"RW1C")==0){ + myregister->mode=PCILIB_REGISTER_RW1C; + }else if(strcmp((char*)value,"W1C")==0){ + myregister->mode=PCILIB_REGISTER_W1C; + } + + }else if(strcmp((char*)cur->name,"name")==0){ + myregister->name=(char*)value; + + }else if(strcmp((char*)cur->name,"value_min")==0){ + /* not implemented yet*/ // myregister->value_min=(pcilib_register_value_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"value_max")==0){ + /* not implemented yet*/ // myregister->value_max=(pcilib_register_value_t)strtol((char*)value,&ptr,0); + + }else if(strcmp((char*)cur->name,"description")==0){ + myregister->description=(char*)value; + } + + cur=cur->next; + } + + /** we then get properties that can not be parsed as the previous ones*/ + if(strcmp((char*)type,"standard")==0){ + myregister->type=PCILIB_REGISTER_STANDARD; + bank=xmlNodeListGetString(doc,xmlFirstElementChild(xmlFirstElementChild(mynode->parent->parent))->xmlChildrenNode,1); /**<we get the bank adress node*/ + + }else if(strcmp((char*)type,"bits")==0){ + myregister->type=PCILIB_REGISTER_BITS; + bank=xmlNodeListGetString(doc,xmlFirstElementChild(xmlFirstElementChild(mynode->parent->parent->parent->parent))->xmlChildrenNode,1);/**<we get the bank adress node*/ + + /* we then get the properties from the parent standard regsiter, and that are not present for the bit register*/ + cur=mynode->parent->parent->children; /**<get the parent standard register*/ + while(cur!=NULL){ + value=xmlNodeListGetString(doc,cur->children,1); + if(strcmp((char*)cur->name,"adress")==0){ + myregister->addr=(pcilib_register_addr_t)strtol((char*)value,&ptr,0); + }else if(strcmp((char*)cur->name,"default")==0){ + myregister->defvalue=(pcilib_register_value_t)strtol((char*)value,&ptr,0); + }else if(strcmp((char*)cur->name,"rwmask")==0){ + if(strcmp((char*)value,"all bits")==0){ + myregister->rwmask=PCILIB_REGISTER_ALL_BITS; + }else if(strcmp((char*)value,"0")==0){ + myregister->rwmask=0; + }else{ + myregister->rwmask=(pcilib_register_value_t)strtol((char*)value,&ptr,0); + } + } + cur=cur->next; + } + + }else if(strcmp((char*)type,"fifo")==0){ + /* not implemented yet*/ myregister->type=PCILIB_REGISTER_FIFO; + } + + if(strcmp((char*)bank,"bank 0")==0){ + myregister->bank=PCILIB_REGISTER_BANK0; + }else if(strcmp((char*)bank,"bank 1")==0){ + myregister->bank=PCILIB_REGISTER_BANK1; + }else if(strcmp((char*)bank,"bank 2")==0){ + myregister->bank=PCILIB_REGISTER_BANK2; + }else if(strcmp((char*)bank,"bank 3")==0){ + myregister->bank=PCILIB_REGISTER_BANK3; + }else if(strcmp((char*)bank,"DMA bank")==0){ + myregister->bank=PCILIB_REGISTER_BANK_DMA; + }else if (strcmp((char*)bank,"dynamic bank")==0){ + myregister->addr=PCILIB_REGISTER_BANK_DYNAMIC; + }else{ + myregister->bank=PCILIB_REGISTER_BANK_INVALID; + } +} + +/** pcilib_xml_initialize_registers + * + * this function create a list of registers from an abstract syntax tree + * + * variables who need change if xml structure change : bank,description, sub_description, sub_adress, sub_bank, sub_rwmask (we consider it to be equal to the standard register), sub_defvalue(same to standard register normally) + * @param[in] doc the xpath context of the xml file. + * @param[in] pci the pcilib_t struct running, that will get filled + */ +void pcilib_xml_initialize_registers(pcilib_t* pci,xmlDocPtr doc){ + + xmlNodeSetPtr nodesetadress=NULL, nodesetsubadress=NULL; + xmlChar *type=NULL; + xmlNodePtr mynode; + xmlXPathContextPtr context; + pcilib_register_description_t *registers=NULL; + pcilib_register_description_t myregister; + int i,j; + + context=pcilib_xml_getcontext(doc); + + /** we first get the nodes of standard and bits registers*/ + nodesetadress=pcilib_xml_getsetproperty(context,REGISTERS_PATH)->nodesetval; + nodesetsubadress=pcilib_xml_getsetproperty(context,BITS_REGISTERS_PATH)->nodesetval; + if(nodesetadress->nodeNr>0)registers=calloc(nodesetadress->nodeNr+nodesetsubadress->nodeNr,sizeof(pcilib_register_description_t)); + else return; + + pci->registers_xml_nodes=calloc(nodesetadress->nodeNr+nodesetsubadress->nodeNr,sizeof(xmlNodePtr)); + if(!(pci->registers_xml_nodes)) pcilib_warning("can't create registers xml nodes in pcilib_t struct"); + + /** we then iterate through standard registers nodes to create registers structures*/ + for(i=0;i<nodesetadress->nodeNr;i++){ + type=(xmlChar*)"standard"; + mynode=nodesetadress->nodeTab[i]; + pcilib_xml_create_register(&myregister,mynode,doc,type); + registers[i]=myregister; + pci->registers_xml_nodes[i]=mynode; + } + + j=i; + /** we then iterate through bits registers nodes to create registers structures*/ + for(i=0;i<nodesetsubadress->nodeNr;i++){ + type=(xmlChar*)"bits"; + mynode=nodesetsubadress->nodeTab[i]; + pcilib_xml_create_register(&myregister,mynode,doc,type); + registers[i+j]=myregister; + pci->registers_xml_nodes[i+j]=mynode; + } + + /**we arrange the register for them to be well placed for pci-l*/ + pcilib_xml_arrange_registers(registers,nodesetadress->nodeNr+nodesetsubadress->nodeNr); + /**we fille the pcilib_t struct*/ + pcilib_add_registers(pci,nodesetadress->nodeNr+nodesetsubadress->nodeNr,registers); +} + + +/** pcilib_init_xml + * this function will initialize the registers and banks from the xml files + * @param[in,out] ctx the pciilib_t running that gets filled with structures + */ + +int pcilib_init_xml(pcilib_t* ctx){ + char *path,*pwd, **line, *line_xsd=NULL; + int i=1,k; + xmlDocPtr* docs; + DIR* rep=NULL; + struct dirent* file=NULL; + int err; + + path=malloc(sizeof(char*)); + line=malloc(sizeof(char*)); + line[0]=NULL; + + /** we first get the env variable corresponding to the place of the xml files*/ + path=getenv("PCILIB_MODEL_DIR"); + if(path==NULL){ + pcilib_warning("can't find environment variable for xml files"); + return 1; + } + + /** we then open the directory corresponding to the ctx model*/ + pwd=malloc((strlen(path)+strlen(ctx->model))*sizeof(char)); + sprintf(pwd,"%s%s/",path,ctx->model); + if((rep=opendir(pwd))==NULL){ + pcilib_warning("could not open the directory for xml files: error %i\n",errno); + return 1; + } + + /** we iterate through the files of the directory, to get the xml files and the xsd file*/ + while((file=readdir(rep))!=NULL){ + if(strstr(file->d_name,".xml")!=NULL){ + line=realloc(line,i*sizeof(char*)); + line[i-1]=malloc((strlen(file->d_name)+strlen(pwd)+1)*sizeof(char)); + sprintf(line[i-1],"%s%s",pwd,file->d_name); /**< here i wanted to use realpath() function, but it was not working correctly*/ + i++; + } + if(strstr(file->d_name,".xsd")!=NULL){ + line_xsd=malloc((strlen(file->d_name)+strlen(pwd))*sizeof(char)); + sprintf(line_xsd,"%s%s",pwd,file->d_name); + } + } + + if(line_xsd==NULL){ + pcilib_warning("no xsd file found"); + return 1; + } + + if(line[0]==NULL){ + pcilib_warning("no xml file found"); + return 1; + } + + /** for each xml file, we validate it, and get the registers and the banks*/ + docs=malloc((i-1)*sizeof(xmlDocPtr)); + for(k=0;k<i-1;k++){ + err=validation(line[k],line_xsd); + if(err==0){ + docs[k]=pcilib_xml_getdoc(line[k]); + pcilib_xml_initialize_banks(ctx,docs[k]); + pcilib_xml_initialize_registers(ctx,docs[k]); + } + } + + // free(path); + free(pwd); + free(line); + free(line_xsd); + free(docs); + return 0; +} + diff --git a/pcilib/xml.h b/pcilib/xml.h new file mode 100644 index 0000000..1ef8ee5 --- /dev/null +++ b/pcilib/xml.h @@ -0,0 +1,27 @@ +/** + * @file xml.h + * @version 1.0 + * @brief header file to support of xml configuration. + * + * @details this file is the header file for the implementation of dynamic registers using xml and several funtionalities for the "pci-tool" line command tool from XML files. the xml part has been implemented using libxml2. + * + * this code was meant to be evolutive as the XML files evolute. In this meaning, most of the xml parsing is realized with XPath expressions(when it was possible), so that changing the xml xould result mainly in changing the XPAth pathes present here. + * @todo cf compilation chain + */ + +#ifndef _XML_ +#define _XML_ + +#include "pcilib.h" + +#define REGISTERS_PATH ((xmlChar*)"/model/banks/bank/registers/register") /**<all standard registers nodes.*/ +#define BITS_REGISTERS_PATH ((xmlChar*)"/model/banks/bank/registers/register/registers_bits/register_bits") /**<all bits registers nodes.*/ +#define BANKS_PATH ((xmlChar*)"/model/banks/bank/bank_description") /**< path to complete nodes of banks.*/ + +/** + * this function gets the xml files and validates them, before filling the pcilib_t struct with the registers and banks of those files + *@param[in,out] pci the pcilib_t struct running that gets filled with banks and registers + */ +int pcilib_init_xml(pcilib_t* pci); + +#endif /*_XML_*/ diff --git a/pcitool/camera.xml b/pcitool/camera.xml new file mode 100644 index 0000000..753c707 --- /dev/null +++ b/pcitool/camera.xml @@ -0,0 +1,923 @@ +<?xml version="1.0" encoding="ISO-8859-1"?> +<model xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> + <banks> + <bank> + <bank_description> + <adress>bank 0</adress> + <bar>0</bar> + <size>128</size> + <protocol>default</protocol> + <read_adress>0x9010</read_adress> + <write_adress>0x9000</write_adress> + <word_size>8</word_size> + <endianess>little</endianess> + <format>%lu</format> + <name>cmosis</name> + <description>CMOSIS CMV2000 Registers</description> + </bank_description> + <registers> + <register> + <adress>1</adress> + <offset>0</offset> + <size>16</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines</name> + <description>test</description> + </register> + <register> + <adress>3</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start1</name> + </register> + <register> + <adress>5</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start2</name> + </register> + <register> + <adress>7</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start3</name> + </register> + <register> + <adress>9</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start4</name> + </register> + <register> + <adress>11</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start5</name> + </register> + <register> + <adress>13</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start6</name> + </register> + <register> + <adress>15</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start7</name> + </register> + <register> + <adress>17</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_start8</name> + </register> + <register> + <adress>19</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines1</name> + </register> + <register> + <adress>21</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines2</name> + </register> + <register> + <adress>23</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines3</name> + </register> + <register> + <adress>25</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines4</name> + </register> + <register> + <adress>27</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines5</name> + </register> + <register> + <adress>29</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines6</name> + </register> + <register> + <adress>31</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines7</name> + </register> + <register> + <adress>33</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_lines8</name> + </register> + <register> + <adress>35</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_sub_s</name> + </register> + <register> + <adress>37</adress> + <offset>0</offset> + <size>16</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_sub_a</name> + </register> + <register> + <adress>39</adress> + <offset>0</offset> + <size>1</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_color</name> + </register> + <register> + <adress>40</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_image_flipping</name> + </register> + <register> + <adress>41</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_flags</name> + </register> + <register> + <adress>42</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_time</name> + <views> + <view>formuu3</view> + <view>enumm3</view> + </views> + </register> + <register> + <adress>45</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_step</name> + </register> + <register> + <adress>48</adress> + <offset>0</offset> + <size>24</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_kp1</name> + </register> + <register> + <adress>51</adress> + <offset>0</offset> + <size>24</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_kp2</name> + </register> + <register> + <adress>54</adress> + <offset>0</offset> + <size>2</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_nr_slopes</name> + </register> + <register> + <adress>55</adress> + <offset>0</offset> + <size>8</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_seq</name> + </register> + <register> + <adress>56</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_time2</name> + </register> + <register> + <adress>59</adress> + <offset>0</offset> + <size>24</size> + <default>1088</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_step2</name> + </register> + <register> + <adress>68</adress> + <offset>0</offset> + <size>2</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_nr_slopes2</name> + </register> + <register> + <adress>69</adress> + <offset>0</offset> + <size>8</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_exp_seq2</name> + </register> + <register> + <adress>70</adress> + <offset>0</offset> + <size>16</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_number_frames</name> + </register> + <register> + <adress>72</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_output_mode</name> + </register> + <register> + <adress>78</adress> + <offset>0</offset> + <size>12</size> + <default>85</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_training_pattern</name> + </register> + <register> + <adress>80</adress> + <offset>0</offset> + <size>18</size> + <default>0x3FFFF</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_channel_en</name> + </register> + <register> + <adress>82</adress> + <offset>0</offset> + <size>3</size> + <default>7</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_special_82</name> + </register> + <register> + <adress>89</adress> + <offset>0</offset> + <size>8</size> + <default>96</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_vlow2</name> + </register> + <register> + <adress>90</adress> + <offset>0</offset> + <size>8</size> + <default>96</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_vlow3</name> + </register> + <register> + <adress>100</adress> + <offset>0</offset> + <size>14</size> + <default>16260</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_offset</name> + </register> + <register> + <adress>102</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_pga</name> + </register> + <register> + <adress>103</adress> + <offset>0</offset> + <size>8</size> + <default>32</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_adc_gain</name> + </register> + <register> + <adress>111</adress> + <offset>0</offset> + <size>1</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_bit_mode</name> + </register> + <register> + <adress>112</adress> + <offset>0</offset> + <size>2</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_adc_resolution</name> + </register> + <register> + <adress>115</adress> + <offset>0</offset> + <size>1</size> + <default>1</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>cmosis_special_115</name> + </register> + </registers> + </bank> + <bank> + <bank_description> + <adress>bank 1</adress> + <bar>0</bar> + <size>0x0200</size> + <protocol>default</protocol> + <read_adress>0x9000</read_adress> + <write_adress>0x9000</write_adress> + <word_size>32</word_size> + <endianess>little</endianess> + <format>0x%lx</format> + <name>fpga</name> + <description>IPECamera Registers</description> + </bank_description> + <registers> + <register> + <adress>0x00</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>spi_conf_input</name> + </register> + <register> + <adress>0x10</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>spi_conf_output</name> + </register> + <register> + <adress>0x20</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>spi_clk_speed</name> + </register> + <register> + <adress>0x30</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>firmware_info</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>8</size> + <mode>R</mode> + <name>firmware_version</name> + </register_bits> + <register_bits> + <offset>8</offset> + <size>1</size> + <mode>R</mode> + <name>firmware_bitmode</name> + </register_bits> + <register_bits> + <offset>12</offset> + <size>2</size> + <mode>R</mode> + <name>adc_resolution</name> + </register_bits> + <register_bits> + <offset>16</offset> + <size>2</size> + <mode>R</mode> + <name>output_mode</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x40</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>control</name> + <registers_bits> + <register_bits> + <offset>31</offset> + <size>1</size> + <mode>R</mode> + <name>freq</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x50</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>status</name> + </register> + <register> + <adress>0x54</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>status2</name> + </register> + <register> + <adress>0x58</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>status3</name> + </register> + <register> + <adress>0x5c</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>fr_status</name> + </register> + <register> + <adress>0x70</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>start_address</name> + </register> + <register> + <adress>0x74</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>end_address</name> + </register> + <register> + <adress>0x78</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>rd_address</name> + </register> + <register> + <adress>0xa0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>fr_param1</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>10</size> + <mode>RW</mode> + <name>fr_skip_lines</name> + </register_bits> + <register_bits> + <offset>10</offset> + <size>11</size> + <mode>RW</mode> + <name>fr_num_lines</name> + </register_bits> + <register_bits> + <offset>21</offset> + <size>11</size> + <mode>RW</mode> + <name>fr_start_address</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0xb0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_param2</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>11</size> + <mode>RW</mode> + <name>fr_threshold_start_line</name> + </register_bits> + <register_bits> + <offset>16</offset> + <size>10</size> + <mode>RW</mode> + <name>fr_area_lines</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0xc0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>skiped_lines</name> + </register> + <register> + <adress>0xd0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_thresholds</name> + </register> + <register> + <adress>0xd0</adress> + <offset>0</offset> + <size>10</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_pixel_thr</name> + </register> + <register> + <adress>0xd0</adress> + <offset>10</offset> + <size>11</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_num_pixel_thr</name> + </register> + <register> + <adress>0xd0</adress> + <offset>21</offset> + <size>11</size> + <default>0</default> + <rwmask>all bits</rwmask> + <mode>RW</mode> + <name>fr_num_lines_thr</name> + </register> + <register> + <adress>0x100</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>rawdata_pkt_addr</name> + </register> + <register> + <adress>0x110</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>temperature_info</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>16</size> + <mode>R</mode> + <name>sensor_temperature</name> + <views> + <view>formuu1</view> + <view>formuu2</view> + <view>enumm2</view> + </views> + </register_bits> + <register_bits> + <offset>16</offset> + <size>3</size> + <mode>R</mode> + <name>sensor_temperature_alarms</name> + </register_bits> + <register_bits> + <offset>19</offset> + <size>10</size> + <mode>RW</mode> + <name>fpga_temperature</name> + <views> + <view>formuu1</view> + <view>enumm1</view> + </views> + </register_bits> + <register_bits> + <offset>29</offset> + <size>3</size> + <mode>R</mode> + <name>fpga_temperature_alarms</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x120</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>num_lines</name> + </register> + <register> + <adress>0x130</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>start_line</name> + </register> + <register> + <adress>0x140</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>exp_time</name> + </register> + <register> + <adress>0x150</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>motor</name> + <registers_bits> + <register_bits> + <offset>0</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_phi</name> + </register_bits> + <register_bits> + <offset>5</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_z</name> + </register_bits> + <register_bits> + <offset>10</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_y</name> + </register_bits> + <register_bits> + <offset>15</offset> + <size>5</size> + <mode>RW</mode> + <name>motor_x</name> + </register_bits> + <register_bits> + <offset>20</offset> + <size>8</size> + <mode>R</mode> + <name>adc_gain</name> + </register_bits> + </registers_bits> + </register> + <register> + <adress>0x160</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>write_status</name> + </register> + <register> + <adress>0x170</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>num_triggers</name> + </register> + <register> + <adress>0x180</adress> + <offset>0</offset> + <size>32</size> + <default>0x280</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>trigger_period</name> + <views> + <view>enumm2</view> + </views> + </register> + <register> + <adress>0x190</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>temperature_sample_period</name> + </register> + <register> + <adress>0x1a0</adress> + <offset>0</offset> + <size>32</size> + <default>0x64</default> + <rwmask>0</rwmask> + <mode>RW</mode> + <name>ddr_max_frames</name> + </register> + <register> + <adress>0x1b0</adress> + <offset>0</offset> + <size>32</size> + <default>0</default> + <rwmask>0</rwmask> + <mode>R</mode> + <name>ddr_num_frames</name> + </register> + </registers> + </bank> + <bank> + <bank_description> + <adress>DMA bank</adress> + <bar>0</bar> + <size>0x0200</size> + <protocol>default</protocol> + <read_adress>0x0</read_adress> + <write_adress>0x0</write_adress> + <word_size>32</word_size> + <endianess>little</endianess> + <format>0x%lx</format> + <name>dma</name> + <description>DMA Registers</description> + </bank_description> + </bank> + </banks> + <views> + <view type="formula"> + <name>formuu1</name> + <unit>C</unit> + <read_from_register>(503975./1024000)*@reg - 27315./100</read_from_register> + <write_to_register>(@value + 27315./100)*(102400./503975)</write_to_register> +<description>formula to get real fpga temperature from the fpga_temperature register in decimal</description> + </view> + <view type="enum"> + <name>enumm1</name> + <enum value="0x100" min="0x2" max="0x300">high</enum> + <enum value="0x010">low</enum> + <description>enum towards temperatures register</description> + </view> + <view type="formula"> + <name>formuu2</name> + <unit>C</unit> + <read_from_register>((1./4)*(@reg - 1200)) if @freq==0 else ((3./10)*(@reg - 1000))</read_from_register> + <write_to_register>4*@value + 1200 if @freq==0 else (10./3)*@value + 1000</write_to_register> + <description>formula to get real sensor temperature from the sensor_temperature register in decimal</description> + </view> + <view type="enum"> + <name>enumm2</name> + <enum value="0x120">high</enum> + <enum value="0x010" min="0x00" max="0x020">low</enum> + <description>enum towards sensor_temperature register</description> + </view> + <view type="formula"> + <name>formuu3</name> + <unit>us</unit> + <read_from_register>(@reg+(43./100))*129./(40*1000000)if @freq==0 else (@reg+(43./100))*129./(48*1000000)</read_from_register> + <write_to_register>@value/129.*(40*1000000) - 43./100 if @freq==0 else @value/129.*(48*1000000) - 43./100</write_to_register> + <description>formula to get real exposure time from the cmosis_exp_time register in decimal</description> + </view> + <view type="enum"> + <name>enumm3</name> + <enum value="0x000">short</enum> + <enum value="0x010">mid</enum> + <enum value="0x100" min="0x0F0">long</enum> + <description>enum towards cmosis_exp_register register</description> + </view> + </views> +</model> diff --git a/pcitool/cli.c b/pcitool/cli.c index 7cd8196..e0aaf28 100644 --- a/pcitool/cli.c +++ b/pcitool/cli.c @@ -39,6 +39,7 @@ #include "error.h" #include "debug.h" #include "model.h" +#include "xml.h" #include "locking.h" /* defines */ @@ -348,6 +349,8 @@ void Usage(int argc, char *argv[], const char *format, ...) { " Data can be specified as sequence of hexdecimal number or\n" " a single value prefixed with '*'. In this case it will be\n" " replicated the specified amount of times\n" +" XML:\n" +" -v -validates the xml file against xsd" "\n\n", argv[0]); @@ -1003,8 +1006,8 @@ int ReadRegister(pcilib_t *handle, const pcilib_model_description_t *model_info, format = model_info->banks[bank_id].format; if (!format) format = "%lu"; - err = pcilib_read_register_by_id(handle, regid, &value); - // err = pcilib_read_register(handle, bank, reg, &value); + err = pcilib_read_register_by_id(handle, regid, &value); + // err = pcilib_read_register(handle, bank, reg, &value); if (err) printf("Error reading register %s\n", reg); else { printf("%s = ", reg); diff --git a/pcitool/config.txt b/pcitool/config.txt new file mode 100644 index 0000000..14bcc57 --- /dev/null +++ b/pcitool/config.txt @@ -0,0 +1,13 @@ +///configuration/// + +pwd to xml model file: +camera.xml + +///pwd to units xml file: +///units.xml +/// +///pwd to python eval file: +///pythonscripts.py +/// +pwd to xsd schema file: +registers_and_banks.xsd diff --git a/pcitool/registers_and_banks.xsd b/pcitool/registers_and_banks.xsd new file mode 100755 index 0000000..10d49b7 --- /dev/null +++ b/pcitool/registers_and_banks.xsd @@ -0,0 +1,242 @@ +<?xml version="1.0" encoding="ISO-8859-1"?> +<xsd:schema xmlns:xsd="http://www.w3.org/2001/XMLSchema"> + + <xsd:element name="model"> + <xsd:complexType> + <xsd:sequence> + <xsd:element name="banks" type="banks_type"/> + <xsd:element name="views" type="views_type" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + </xsd:complexType> + <xsd:key name="Registerkey"> + <xsd:selector xpath="views/view/name"/> + <xsd:field xpath="."/> + </xsd:key> + <xsd:keyref refer="Registerkey" name="RegisterkeyRef"> + <xsd:selector xpath="banks/bank/registers/register/views/view"/> + <xsd:field xpath="."/> + </xsd:keyref> + <xsd:key name="Registerbitskey"> + <xsd:selector xpath="views/view/name"/> + <xsd:field xpath="."/> + </xsd:key> + <xsd:keyref refer="Registerbitskey" name="RegisterbitskeyRef"> + <xsd:selector xpath="banks/bank/registers/register/registers_bits/register_bits/views/view"/> + <xsd:field xpath="."/> + </xsd:keyref> + </xsd:element> + + + <xsd:complexType name="views_type"> + <xsd:sequence> + <xsd:element name="view" type="view_type" maxOccurs="unbounded"/> + </xsd:sequence> + </xsd:complexType> + + + <xsd:complexType name="banks_type"> + <xsd:sequence> + <xsd:element name="bank" type="banktype" minOccurs="1" maxOccurs="12"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="banktype"> + <xsd:sequence> + <xsd:element name="bank_description" type="bank_description_t"/> + <xsd:element name="registers" type="registerstype" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="bank_description_t"> + <xsd:sequence> + <xsd:element name="adress" type="bank_adress_type"/> + <xsd:element name="bar" type="bar_type"/> + <xsd:element name="size" type="hexa_and_integer64_t"/> + <xsd:element name="protocol" type="xsd:string"/> + <xsd:element name="read_adress" type="hex64_t"/> + <xsd:element name="write_adress" type="hex64_t"/> + <xsd:element name="word_size" type="uint8_t"/> + <xsd:element name="endianess" type="endianess_type"/> + <xsd:element name="format" type="xsd:string"/> + <xsd:element name="name" type="xsd:string"/> + <xsd:element name="description" type="xsd:string" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + </xsd:complexType> + + + <xsd:complexType name="registerstype"> + <xsd:sequence> + <xsd:element name="register" type="register_type" minOccurs="0" maxOccurs="256"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="register_type"> + <xsd:sequence> + <xsd:element name="adress" type="hexa_and_integer32_t"/> + <xsd:element name="offset" type="uint8_t"/> + <xsd:element name="size" type="uint8_t"/> + <xsd:element name="default" type="hexa_and_integer32_t"/> + <xsd:element name="rwmask" type="rwmask_type"/> + <xsd:element name="mode" type="pcilib_register_mode_t"/> + <xsd:element name="name" type="xsd:string"/> + <xsd:element name="description" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="views" type="reg_to_views_type" minOccurs="0" maxOccurs="1"/> + <xsd:element name="registers_bits" type="registers_bits_type" minOccurs="0" maxOccurs="1"/> + <xsd:element name="value_min" type="hexa_and_integer32_t" minOccurs="0" maxOccurs="1"/> + <xsd:element name="value_max" type="hexa_and_integer32_t" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="registers_bits_type"> + <xsd:sequence> + <xsd:element name="register_bits" type="register_bits_type" minOccurs="1" maxOccurs="32"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="reg_to_views_type"> + <xsd:sequence> + <xsd:element name="view" type="xsd:string" minOccurs="1" maxOccurs="unbounded"/> + </xsd:sequence> + </xsd:complexType> + + <xsd:complexType name="register_bits_type"> + <xsd:sequence> + <xsd:element name="offset" type="uint8_t"/> + <xsd:element name="size" type="uint8_t"/> + <xsd:element name="mode" type="pcilib_register_mode_t"/> + <xsd:element name="name" type="xsd:string"/> + <xsd:element name="description" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="views" type="reg_to_views_type" minOccurs="0" maxOccurs="1"/> + </xsd:sequence> + + </xsd:complexType> + + <xsd:simpleType name="uint8_t"> + <xsd:restriction base="xsd:integer"> + <xsd:minInclusive value="0"/> + <xsd:maxInclusive value="255"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="size_t"> + <xsd:restriction base="xsd:integer"> + <xsd:minInclusive value="0"/> + <xsd:maxInclusive value="18446744073709551615"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="uintptr_t"> + <xsd:restriction base="xsd:integer"> + <xsd:minInclusive value="0"/> + <xsd:maxInclusive value="18446744073709551615"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="uint32_t"> + <xsd:restriction base="xsd:integer"> + <xsd:minInclusive value="0"/> + <xsd:maxInclusive value="4294967295"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="pcilib_register_mode_t"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="R"/> + <xsd:enumeration value="W"/> + <xsd:enumeration value="RW"/> + <xsd:enumeration value="W1C"/> + <xsd:enumeration value="RW1C"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="bank_adress_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="bank 0"/> + <xsd:enumeration value="bank 1"/> + <xsd:enumeration value="bank 2"/> + <xsd:enumeration value="bank 3"/> + <xsd:enumeration value="DMA bank"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="endianess_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="little"/> + <xsd:enumeration value="big"/> + <xsd:enumeration value="host"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="bar_type"> + <xsd:restriction base="xsd:integer"> + <xsd:enumeration value="0"/> + <xsd:enumeration value="1"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="space_adress_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="write adress"/> + <xsd:enumeration value="read adress"/> + <xsd:enumeration value="space adress"/> + <xsd:enumeration value="0"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="rwmask_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="all bits"/> + <xsd:enumeration value="0"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="hexa_and_integer32_t"> + <xsd:union memberTypes="uint32_t hex32_t"/> + </xsd:simpleType> + + <xsd:simpleType name="hex32_t"> + <xsd:restriction base="xsd:string"> + <xsd:pattern value="0x([a-fA-F0-9]){0,8}"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:simpleType name="hexa_and_integer64_t"> + <xsd:union memberTypes="size_t hex64_t"/> + </xsd:simpleType> + + <xsd:simpleType name="hex64_t"> + <xsd:restriction base="xsd:string"> + <xsd:pattern value="0x([a-fA-F0-9]){0,16}"/> + </xsd:restriction> + </xsd:simpleType> + + <xsd:complexType name="view_type"> + <xsd:sequence> + <xsd:element name="name" type="xsd:ID"/> + <xsd:element name="unit" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="read_from_register" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="write_to_register" type="xsd:string" minOccurs="0" maxOccurs="1"/> + <xsd:element name="enum" type="enum_t" minOccurs="0" maxOccurs="unbounded"/> + <xsd:element name="description" type="xsd:string"/> + </xsd:sequence> + <xsd:attribute name="type" type="viewtype_type" use="required"/> + </xsd:complexType> + + <xsd:complexType name="enum_t"> + <xsd:simpleContent> + <xsd:extension base="xsd:string"> + <xsd:attribute name="value" type="hexa_and_integer64_t" use="required"/> + <xsd:attribute name="min" type="hexa_and_integer64_t"/> + <xsd:attribute name="max" type="hexa_and_integer64_t"/> + </xsd:extension> + </xsd:simpleContent> + </xsd:complexType> + + <xsd:simpleType name="viewtype_type"> + <xsd:restriction base="xsd:string"> + <xsd:enumeration value="enum"/> + <xsd:enumeration value="formula"/> + </xsd:restriction> + </xsd:simpleType> + +</xsd:schema> diff --git a/protocols/default.c b/protocols/default.c index 5e344cf..dd1da54 100644 --- a/protocols/default.c +++ b/protocols/default.c @@ -13,15 +13,18 @@ int pcilib_default_read(pcilib_t *ctx, pcilib_register_bank_context_t *bank_ctx, pcilib_register_value_t val = 0; const pcilib_register_bank_description_t *b = bank_ctx->bank; - + printf("bank name %s\n",b->name); + printf("bank bar %i\n",b->bar); + printf("addr %i\n",addr); int access = b->access / 8; - + printf("access : %i\n",access); ptr = pcilib_resolve_register_address(ctx, b->bar, b->read_addr + addr); + // printf("ptr %s\n",ptr); default_datacpy(&val, ptr, access, b); - + printf("val : %i\n",val); // *value = val&BIT_MASK(bits); *value = val; - + printf("value : %i\n",*value); return 0; } |